NXP Semiconductors SCC2691AE1N24,129

Overview

SCC2691AE1N24 from NXP Semiconductors (formerly Philips Semiconductors) is a CMOS-LSI universal asynchronous receiver/transmitter (UART) providing full-duplex serial communication with quadruple-buffered receiver, independent receiver/transmitter baud rate selection, and 16-bit programmable counter/timer. It operates from a single +5V supply, supports 5–8 data bits, 1/1.5/2 stop bits, and odd/even/no parity, and targets industrial embedded systems requiring robust RS-232/RS-422 interface control at –40°C to +85°C.

For engineers reviewing the SCC2691AE1N24 datasheet, SCC2691AE1N24 pinout, SCC2691AE1N24 application, or SCC2691AE1N24 equivalent, key selection criteria include TTL-compatible 24-pin DIP packaging, dual-speed channel support via independent baud rate generators, receiver FIFO overrun prevention via RTS handshake, low-power mode with register retention, and compatibility with legacy 8080/8085/Z80 bus timing.

Technical Context

The SCC2691AE1N24 implements a fully synchronous UART architecture with separate clock selectors for receiver and transmitter paths, enabling simultaneous operation at different baud rates-e.g., 9600 baud on Rx and 115.2 kbaud on Tx. Its 16-bit counter/timer functions as both baud rate source and general-purpose timing resource, configurable via auxiliary control register (ACR) to output on MPO pin.

Receiver logic includes false start bit detection, line break generation/detection, framing/parity/overrun error flagging, and address-frame recognition mode for multi-processor wake-up. Transmitter supports automatic break generation, local/remote loopback, and echo modes-all controlled via command register (CR) and mode registers (MR1/MR2) accessed through A0–A2 address lines.

Key Specifications

Pinout & Package

SCC2691AE1N24 is housed in a 24-pin plastic dual in-line package (DIP), 300 mil width, with 0.3 inch row spacing and through-hole mounting. Pin 1 is RDN (Read Strobe), pin 24 is VCC (+5 V), and pin 12 is GND. All pins comply with standard TTL voltage thresholds and drive capabilities.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar UART applications.

Compared with SCC2692AE1N24, the SCC2691AE1N24 offers lower gate count and reduced power for single-port use, while retaining identical industrial temperature support and register-level firmware compatibility. Against TL16C550CP, it provides superior flexibility in mixed-speed channel design and deterministic low-latency interrupt response due to simpler status register structure.

Availability

SCC2691AE1N24 is available at Aetrix Electronics and suitable for industrial automation, legacy system retrofits, medical device gateways, and multi-processor sensor hubs requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for SCC2691AE1N24 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors, headquartered in Eindhoven, Netherlands, develops high-performance analog and mixed-signal ICs for automotive, industrial, and communication markets, with deep heritage in Philips semiconductor technology.

The SCC2691 series was designed specifically for industrial and embedded systems requiring robust, register-compatible UART functionality with extended temperature operation, low-power modes, and flexible clocking-targeting applications where long-term availability and deterministic timing behavior are critical.

FAQ

What is the maximum supported baud rate for SCC2691AE1N24?

The SCC2691AE1N24 supports up to 115.2 kbaud using its internal baud rate generator or external 16X clock input. When driven by a 3.6864 MHz crystal, the BRG delivers 18 standard rates including 115.2 kbaud; non-standard rates up to this limit are achievable via the 16-bit counter/timer configured as a programmable divider. The actual achievable rate depends on clock source stability and external transceiver capability.

Does SCC2691AE1N24 support automatic hardware flow control?

Yes, SCC2691AE1N24 supports automatic RTS/CTS flow control. By programming the auxiliary control register (ACR), the MPO pin can be configured as RTSN (Request to Send), which is automatically negated when the receiver FIFO reaches capacity and reasserted when space becomes available. This hardware handshake prevents receiver overrun without CPU intervention and is fully compatible with standard RS-232 transceivers.

Can SCC2691AE1N24 operate with an external clock instead of a crystal?

Yes, SCC2691AE1N24 accepts an external clock signal on the X1/CLK pin, eliminating the need for a crystal. The external clock must be within 0–4 MHz and meet TTL voltage thresholds (VIH ≥ 0.8VCC, VIL ≤ 0.8 V). When using external clocking, X2 should be left unconnected or grounded. The internal oscillator is bypassed, and all timing-including baud generation and counter/timer-is derived directly from the applied clock.

What is the function of the MPI pin on SCC2691AE1N24?

The MPI (Multi-Purpose Input) pin on SCC2691AE1N24 serves as a configurable digital input supporting four modes: general-purpose input (GPI), clear-to-send (CTSN), counter/timer external clock (CTCLK), or receiver/transmitter external clock (RTCLK). Its state is readable via the interrupt status register (ISR), and it features an internal VCC pull-up (1–4 µA), allowing direct connection to open-collector signals without external resistors.

Is SCC2691AE1N24 pin-compatible with other UARTs in the SCC26xx family?

SCC2691AE1N24 is pin-compatible with SCC2691AC1N24 (commercial grade) and SCC2691AE1A28 (PLCC package), sharing identical 24-pin DIP pinout, register mapping, and electrical characteristics. However, it is not pin-compatible with SCC2692 (dual-channel) or TL16C550 (different pin count, register layout, and FIFO depth), despite functional overlap in basic UART operation.