NXP Semiconductors SCC2692AC1N28,129
- Part No.:
- SCC2692AC1N28,129
- Manufacturer:
- NXP Semiconductors
- Package:
- 28-DIP (0.600", 15.24mm)
- Datasheet:
-
SCC2692AC1N28,129.pdf
- Description:
- IC DUART 1MBPS 28DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SCC2692AC1N28,129 from NXP Semiconductors (formerly Philips) is a dual-channel CMOS-LSI asynchronous receiver/transmitter (DUART) in a 28-pin DIP package. It provides two independent full-duplex UART channels with quadruple-buffered receivers, programmable 5–8-bit data format, 1–2 stop bits, odd/even/no parity, and independent baud rate selection per channel - supporting up to 115.2 kbaud. It interfaces directly with 8-bit microprocessors via TTL-compatible parallel bus and is used in industrial terminal systems, legacy serial communication controllers, and multidrop RS-232/RS-422 subsystems.
For engineers reviewing the SCC2692AC1N28,129 datasheet, SCC2692AC1N28,129 pinout, SCC2692AC1N28,129 application, or SCC2692AC1N28,129 equivalent, key selection considerations include its 28-pin DIP footprint, independent Rx/Tx clock sourcing (crystal, counter/timer, or external 1X/16X), receiver timeout mode, automatic wake-up for multidrop, and dual 7-bit input / 8-bit output multifunction ports usable as status/interrupt signals or general-purpose I/O.
Technical Context
The SCC2692AC1N28,129 implements two fully independent UART channels sharing a single 16-bit programmable counter/timer and one on-chip crystal oscillator (3.6864 MHz nominal). Each channel supports separate configuration of data format, baud rate source (22 fixed rates, counter/timer-derived, or external clock), and operational mode (normal, echo, local/remote loopback, or multidrop/wake-up).
Its interrupt architecture features a single active-low open-drain INTRN output with eight maskable sources plus six wire-ORable discrete interrupt outputs assignable to OP3–OP7. The 7-bit input port includes change-of-state detection on IP0–IP3 and internal ~100 kΩ pull-ups; the 8-bit output port supports individual bit set/reset and configurable function assignment via OPCR and mode registers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Function | Dual full-duplex asynchronous receiver/transmitter (DUART) with independent channel control |
| Supply Voltage | +5 V ±10%; enables direct interface with legacy 5V microprocessor buses without level translation |
| Max Baud Rate | 115.2 kbaud per channel; supports standard telecom and industrial serial protocols |
| Data Format | 5–8 data bits, 1/1.5/2 stop bits (programmable in 1/16-bit increments), odd/even/no/force parity |
| Receiver Buffering | Quadruple-buffered RHR per channel; reduces interrupt overhead and prevents overrun in high-speed polled systems |
| Package | 28-pin plastic DIP (SOT117-1); compatible with through-hole prototyping and legacy industrial PCB layouts |
| Operating Temp | 0 °C to +70 °C (commercial grade); validated for stable operation in office and light-industrial environments |
| Power Dissipation | 1.22 W max at 25 °C; derates 19 mW/°C above ambient - supports passive cooling in dense backplane designs |
Pinout & Package
SCC2692AC1N28,129 uses a 28-pin plastic dual in-line package (DIP), SOT117-1, with 0.3-inch body width and standard 0.1-inch pin pitch. Pin 1 is index corner; pins 14–28 are on right side, pins 1–13 on left side (viewed top-down, notch up).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | NC | No connect; must remain unconnected per datasheet |
| 2–4 | A0–A2 | Address inputs selecting internal registers (0–15) during CPU read/write cycles |
| 5, 8 | IP1, IP0 | Channel B/A clear-to-send (CTSBN/CTSAN) inputs; active-low handshake with external modems or line drivers |
| 9, 10 | WRN, RDN | Active-low write/read strobes; edge-triggered control of data bus transfers with CEN |
| 11, 13 | RXDB, TXDB | Channel B serial I/O; RXDB accepts mark/space logic levels; TXDB drives mark/space with auto-idle high |
| 14–17 | OP1–OP4 | General-purpose outputs or channel-specific signals (RTSBN, TxRDYBN, RxRDYAN, FFULLAN) |
| 18 | INTRN | Active-low open-drain interrupt output; requires external pull-up; asserts on any enabled interrupt condition |
| 19–21, 25–27 | D1/D3/D5/D6/D4/D2 | Data bus bits D1–D7 (D0 omitted); bidirectional 3-state lines for register access and status/data transfer |
| 22 | GND | Signal ground reference for all digital and analog timing circuits |
| 23 | NC | No connect; electrically isolated per design |
| 24 | X1/CLK | Clock input for crystal (3.6864 MHz) or external timing source; drives baud rate generator and counter/timer |
| 28 | VCC | +5 V power supply; decoupling capacitor required within 1 cm of pin per layout guidelines |
| 29–32 | RXDA, TXDA, OP0, OP6 | Channel A serial I/O and RTSAN/TxRDYAN outputs; OP0/OP6 support automatic deactivation on transmit/receive |
| 33–39 | CEN, RESET, X2, OP7, OP5, OP3, OP2 | Chip enable, hardware reset, crystal second terminal, and multifunction outputs (TxRDYBN, RxRDYBN, CTCLK, RxCLKA) |
Key Features
| Feature | Design Value |
|---|---|
| Independent Rx/Tx baud rate selection | Each channel selects from 22 fixed rates, counter/timer-derived non-standard rates, or external 1X/16X clocks - enabling dual-speed operation in clustered terminals |
| Receiver timeout mode | Automatically detects idle line conditions and triggers interrupt; eliminates need for external timers in half-duplex polling systems |
| Multidrop wake-up capability | Supports 9-bit address/data mode with automatic address recognition and channel activation - reduces bus contention in multi-node RS-485 networks |
| Flow control via remote transmitter disable | FFULL interrupt and OP4/OP5 outputs allow host to signal remote DUART to halt transmission when local buffer nears capacity |
| On-chip crystal oscillator | Eliminates external oscillator components; supports 2–4 MHz crystals for precise baud rate generation without clock distribution skew |
| Power down mode | Reduces ICC to ≤10 µA; retains register state and enables fast wake-up for battery-backed or low-power serial gateways |
Applications
| Industrial Serial Terminal Controller | Legacy POS System Interface |
|---|---|
Use Scenario: Connecting multiple ASCII terminals to a central controller over RS-232 links in factory-floor HMI panels. IC Role / Device Role / Timing Role: Dual UART handles simultaneous keyboard input (Rx) and display output (Tx) per terminal; receiver timeout manages line discipline during operator pauses. Use Value: Quadruple buffering prevents character loss at 9600 baud under interrupt latency; multidrop mode allows shared bus addressing across 8+ terminals. | Use Scenario: Interfacing receipt printers, barcode scanners, and cash drawers to embedded x86-based point-of-sale motherboards. IC Role / Device Role / Timing Role: SCC2692AC1N28,129 acts as dedicated serial bridge with RTS/CTS flow control between peripherals and host BIOS UART. Use Value: Independent baud rate per channel supports 19.2 kbaud printer + 115.2 kbaud scanner simultaneously; OP0/OP1 auto-deactivate on transmit to prevent bus contention. |
| RS-422 Multidrop Data Logger | Embedded Modem Control Subsystem |
Use Scenario: Aggregating sensor telemetry from 12 remote nodes over long-haul RS-422 differential links in environmental monitoring stations. IC Role / Device Role / Timing Role: SCC2692AC1N28,129 operates in multidrop (9-bit) mode with automatic wake-up; Channel A polls nodes, Channel B receives responses. Use Value: Hardware-addressed wake-up reduces polling overhead by >70%; receiver overrun protection ensures no frame loss during burst transmissions. | Use Scenario: Managing Hayes-compatible dial-up modems in network access servers requiring AT command parsing and data path switching. IC Role / Device Role / Timing Role: SCC2692AC1N28,129 provides full-duplex AT command channel (Channel A) and synchronous data channel (Channel B) with break detection. Use Value: False start-bit rejection and line-break generation enable robust modem handshaking; 16X sampling rejects noise-induced framing errors on noisy PSTN lines. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UART applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SCN2681ACZ | Pin-compatible predecessor; lacks counter/timer, receiver timeout, and multidrop wake-up; only 18 fixed baud rates | Suitable for basic dual-terminal systems without advanced flow control or clock flexibility | Select SCN2681ACZ only if legacy board reuse mandates identical pinout and minimal feature set |
| TL16C2550IPN | 3.3V/5V tolerant; 16-byte FIFO per channel; enhanced interrupt handling; supports IrDA and Smart Card modes | Requires voltage translation for pure 5V systems; superior for high-throughput USB-to-serial bridges or secure peripheral interfaces | Choose TL16C2550IPN when upgrading from SCC2692AC1N28,129 for higher data integrity, lower CPU load, or mixed-voltage designs |
Compared with SCN2681ACZ, SCC2692AC1N28,129 adds critical features like independent Rx/Tx clocking and multidrop wake-up; versus TL16C2550IPN, it trades FIFO depth and modern interfaces for proven 5V reliability and simpler register mapping in cost-sensitive industrial retrofits.
Availability
SCC2692AC1N28,129 is available at Aetrix Electronics and suitable for industrial serial terminal controllers, legacy POS system interfaces, and RS-422 multidrop data loggers requiring stable component supply across extended production lifecycles.
Supply support for SCC2692AC1N28,129 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications. Formerly Philips Semiconductors, it maintains legacy product support with full documentation and long-term supply commitments.
The SCC2692AC1N28,129 belongs to NXP's legacy communications IC portfolio, designed specifically for robust, low-cost serial interface expansion in 5V microprocessor systems where pin compatibility, deterministic timing, and field-proven reliability are prioritized over high-speed throughput.
FAQ
What is the maximum supported baud rate for SCC2692AC1N28,129?
The SCC2692AC1N28,129 supports a maximum baud rate of 115.2 kbaud per channel using its internal baud rate generator with a 3.6864 MHz crystal. Non-standard rates up to 115.2 kbaud are achievable via the programmable 16-bit counter/timer or external 1X/16X clock inputs. Actual achievable rate depends on clock source stability and system timing margins.
Does SCC2692AC1N28,129 support hardware flow control?
Yes, SCC2692AC1N28,129 supports hardware flow control via active-low CTS inputs (IP0/IP1) and RTS outputs (OP0/OP1). When CTS is asserted, transmission proceeds; if CTS goes high mid-transmission, the current character completes before TxDA/TxDB enters mark state. OP0/OP1 can be auto-deactivated after transmission completion under software control.
Can SCC2692AC1N28,129 operate with an external clock instead of a crystal?
Yes, SCC2692AC1N28,129 can accept an external clock signal on the X1/CLK pin (0–4 MHz), eliminating the need for a crystal. X2 may be left unconnected or grounded. External clock operation maintains full functionality including baud rate generation, counter/timer, and interrupt timing - verified across commercial temperature range.
What is the purpose of the 7-bit input port on SCC2692AC1N28,129?
The 7-bit input port (IP0–IP6) on SCC2692AC1N28,129 serves dual roles: general-purpose digital inputs or dedicated control signals (e.g., CTS, external clock inputs). Four pins (IP0–IP3) support change-of-state detection with interrupt capability. All inputs feature internal ~100 kΩ pull-up resistors, enabling direct connection to open-collector or switch-based controls without external components.
Is SCC2692AC1N28,129 compatible with the SCN2681?
Yes, SCC2692AC1N28,129 is explicitly stated as compatible with the SCN2681 in its Philips datasheet. It retains identical pinout, register map, and basic UART functionality while adding enhancements including independent Rx/Tx clocking, receiver timeout, multidrop wake-up, and expanded baud rate options - making it a functional upgrade path.
SCC2692AC1N28,129 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 28-DIP (0.600", 15.24mm)
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Features:
- Configurable GPIO, Internal Oscillator, Timer/Counter
- Number of Channels:
- 2, DUART
- FIFO's:
- -
- Protocol:
- -
- Data Rate (Max):
- 1Mbps
- Voltage - Supply:
- 5V
- With Auto Flow Control:
- Yes
- With IrDA Encoder/Decoder:
- -
- With False Start Bit Detection:
- Yes
- With Modem Control:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 28-DIP
SCC2692AC1N28,129 FAQ
1.How can I place an order for SCC2692AC1N28,129 through Aetrix?
Please submit a Request for Quotation (RFQ) for SCC2692AC1N28,129 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SCC2692AC1N28,129 reliable?
The price and inventory of SCC2692AC1N28,129 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SCC2692AC1N28,129 is usually 5 days.
3.What payment methods are accepted for SCC2692AC1N28,129?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SCC2692AC1N28,129 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SCC2692AC1N28,129?
SCC2692AC1N28,129 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SCC2692AC1N28,129 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SCC2692AC1N28,129?
For technical support, including SCC2692AC1N28,129 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SCC2692AC1N28,129 requirements.
6.How does Aetrix verify that SCC2692AC1N28,129 is sourced from the original manufacturer or authorized distributors?
All SCC2692AC1N28,129 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SCC2692AC1N28,129 meets industry standards.
7.What is the process for return or replacement of SCC2692AC1N28,129?
All SCC2692AC1N28,129 units undergo pre-shipment inspection (PSI). If there is an issue with SCC2692AC1N28,129, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SCC2692AC1N28,129 part is unused and in its original packaging.
Return procedure for SCC2692AC1N28,129:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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