NXP Semiconductors SCC2692AC1N28,602

Overview

SCC2692AC1N28,602 from NXP Semiconductors (formerly Philips Semiconductors) is a dual-channel CMOS asynchronous receiver/transmitter (DUART) in a 28-pin DIP package, supporting independent programmable baud rates up to 115.2 kbaud per channel, quadruple receiver buffering, and TTL-compatible +5 V operation. It interfaces directly with microprocessors via an 8-bit bidirectional data bus and supports polled or interrupt-driven communication in industrial serial terminal systems.

For engineers reviewing the SCC2692AC1N28,602 datasheet, SCC2692AC1N28,602 pinout, SCC2692AC1N28,602 application, or SCC2692AC1N28,602 equivalent, key selection considerations include its 28-pin DIP footprint, dual full-duplex UART channels with independent baud rate control, 7-bit input/8-bit output multifunction ports, on-chip crystal oscillator, and support for multidrop wake-up mode.

Technical Context

The SCC2692AC1N28,602 implements two independent UART channels (A and B), each with fully programmable data format (5–8 data bits, odd/even/no/force parity, 1/1.5/2 stop bits), separate receiver/transmitter clock sources (1X or 16X), and dedicated status/error detection (parity, framing, overrun, false start, line break). Its timing subsystem integrates a 16-bit counter/timer, baud rate generator with 22 fixed rates (50–115.2 kbaud), and on-chip crystal oscillator.

It features a single active-low open-drain interrupt output (INTRN) with eight maskable conditions, plus configurable discrete interrupt outputs on OP3–OP7; a 7-bit input port with change-of-state detection on IP0–IP3; and an 8-bit output port with individual bit set/reset and function assignment (e.g., RTS, TxRDY, RxRDY). All registers are memory-mapped via A0–A3 address lines and accessed using WRN/RDN/CEN strobes.

Key Specifications

Pinout & Package

SCC2692AC1N28,602 is housed in a 28-pin plastic dual in-line package (DIP), SOT117-1, with 0.6-inch width and standard 0.1-inch pin pitch. Pin 1 is index corner; pins 14–28 occupy one side, pins 1–13 the other. Ground (pin 22) and VCC (pin 28) are positioned for noise reduction.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual UART applications.

Compared with SCN2681ACZ, SCC2692AC1N28,602 adds critical features for modern industrial serial infrastructure - including independent baud rate control, multidrop wake-up, and hardware flow control - while maintaining backward software compatibility. Versus TL16C550CPTR, it trades FIFO depth for simpler integration in cost-sensitive, 5 V-only embedded controllers without PCI/ISA constraints.

Availability

SCC2692AC1N28,602 is available at Aetrix Electronics and suitable for industrial serial terminal interfaces, legacy POS system controllers, modem communication adapters, and PLC serial gateways requiring stable component supply across extended product lifecycles.

Supply support for SCC2692AC1N28,602 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company formed from the spin-off of Philips Semiconductors in 2006, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.

The SCC2692AC1N28,602 belongs to NXP's legacy communications IC portfolio, designed specifically for reliable, low-power dual-channel serial interfacing in industrial control, terminal equipment, and embedded systems where long-term availability and proven 5 V TTL interoperability are essential.

FAQ

What is the maximum supported baud rate for SCC2692AC1N28,602?

The SCC2692AC1N28,602 supports a maximum baud rate of 115.2 kbaud per channel using its internal baud rate generator with a 3.6864 MHz crystal. Non-standard rates up to 115.2 kbaud are achievable via the programmable 16-bit counter/timer. External 1X or 16X clocks allow operation beyond this limit, constrained only by AC timing specifications (e.g., fRX ≤ 2 MHz in 16X mode).

Does SCC2692AC1N28,602 require an external crystal oscillator?

No - the SCC2692AC1N28,602 includes an on-chip crystal oscillator and operates with a 3.6864 MHz crystal connected between X1/CLK and X2 pins. Alternatively, an external 3.6864 MHz clock may be applied to X1/CLK with X2 grounded or left unconnected, eliminating the need for external oscillator circuitry.

How does the quadruple receiver buffering in SCC2692AC1N28,602 improve system reliability?

The quadruple receiver buffering in SCC2692AC1N28,602 provides four levels of receive holding register (RHR) depth per channel, allowing up to four characters to be stored before overrun occurs. This significantly reduces interrupt latency requirements and CPU polling frequency, preventing data loss in burst-mode reception scenarios common in industrial terminal and modem applications.

Can SCC2692AC1N28,602 operate in multidrop (9-bit) mode?

Yes - the SCC2692AC1N28,602 supports multidrop (also called 'wake-up' or '9-bit') mode via programmable channel configuration. In this mode, the ninth bit distinguishes address frames from data frames, enabling selective addressing of multiple slave devices on a shared serial bus without requiring external address decoding logic.

What is the function of the 7-bit input port (IP0–IP6) on SCC2692AC1N28,602?

The 7-bit input port (IP0–IP6) on SCC2692AC1N28,602 serves dual roles: general-purpose digital inputs or dedicated control signals (e.g., CTS, external clock inputs). IP0–IP3 support hardware change-of-state detection with interrupt capability, while all pins feature internal ~2.5 kΩ pull-up resistors - eliminating external biasing components in most configurations.