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NXP Semiconductors SCC2692AE1A44,529

Part No.:
SCC2692AE1A44,529
Manufacturer:
NXP Semiconductors
Category:
UARTs (Universal Asynchronous Receiver Transmitter)
Package:
44-LCC (J-Lead)
Datasheet:
AetrixSCC2692AE1A44,529.pdf
Description:
IC DUART DUAL W/FIFO 44-PLCC
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:2,137

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Product details

Overview

SCC2692AE1A44,529 from NXP Semiconductors (formerly Philips) is a dual-channel CMOS universal asynchronous receiver/transmitter (DUART) in 44-pin PLCC package, supporting independent programmable baud rates up to 115.2 kbaud per channel, quadruple-buffered receivers, and TTL-compatible +5 V operation for industrial serial communication systems.

For engineers reviewing the SCC2692AE1A44,529 datasheet, SCC2692AE1A44,529 pinout, SCC2692AE1A44,529 application, or SCC2692AE1A44,529 equivalent, this page delivers verified technical context, real-world timing constraints, register-level interrupt behavior, and precise I/O port configuration details required for legacy system integration and long-lifecycle embedded design.

Technical Context

The SCC2692AE1A44,529 implements two fully independent UART channels with separate 16-bit programmable counter/timers, enabling asymmetric baud rate generation - e.g., Channel A at 9600 baud (16× clock = 153.6 kHz) while Channel B runs at 38.4 kbaud using external 1X clock on IP5/IP6. Each channel supports 5–8 data bits, odd/even/no/forced parity, and 1/1.5/2 stop bits programmable in 1/16-bit increments.

Its interrupt architecture uses a single active-low open-drain INTRN output with eight maskable sources, plus configurable discrete outputs OP3–OP7 for wire-ORable channel-specific interrupts (e.g., RxRDYBN on OP5, TxRDYAN on OP6). The 7-bit input port includes change-of-state detection on IP0–IP3 with 25–50 µs minimum pulse width recognition, synchronized to a 38.4 kHz internal sampling clock derived from the BRG.

Key Specifications

Parameter Value and Actual Design Meaning
Baud Rates 22 fixed rates (50–115.2 kbaud); non-standard user-defined via 16-bit counter/timer; external 1X/16X clock support per channel
Data Format 5–8 data bits + parity (odd/even/no/force) + 1/1.5/2 stop bits, programmable in 1/16-bit increments
Receiver Buffering Quadruple-buffered RHR per channel - reduces interrupt overhead and prevents overrun in high-throughput polled systems
Interrupt System Single INTRN output with 8 maskable sources; OP3–OP7 configurable as discrete open-drain interrupt outputs
Input Port 7-bit multipurpose input port with change-of-state detection on IP0–IP3; internal ~100 kΩ pull-ups; no external bias required
Output Port 8-bit multipurpose output port with individual bit set/reset (addresses H'E'/H'F'); programmable as status/interrupt signals or general I/O
Crystal Oscillator On-chip oscillator supporting 2–4 MHz crystal (nominal 3.6864 MHz); X1/CLK accepts external clock; X2 may be left unconnected

Pinout & Package

SCC2692AE1A44,529 is housed in a 44-pin Plastic Leaded Chip Carrier (PLCC) package (SOT187-2), lead-free compatible, with gull-wing leads and index corner marking. Pin 1 is located at the index corner; pin numbering proceeds counterclockwise.

Pin/Terminal Circuit Role Design Meaning
1–4, 40–44 A3–A0, VCC, IP4–IP2, CEN, RESET, X2, X1/CLK Address bus (A0–A3), power (VCC), control inputs (CEN, RESET), and crystal interface (X1/CLK, X2)
5–22 RxDB, TxDB, OP1–OP7, D1–D7, GND, INTRN Channel B serial I/O, 8-bit output port (OP0–OP7), bidirectional data bus (D0–D7), ground, and interrupt request
23–39 N/C, OP6–OP0, TxDA, RxDA, D6–D0, RDN, WRN No-connect (Pin 23), output port pins, Channel A serial I/O, data bus LSB–MSB, and read/write strobes

Key Features

Feature Design Value
Dual full-duplex UART channels Independent programming of mode, format, and speed per channel - enables clustered terminal or multidrop master/slave topologies
Quadruple receiver buffering Four-deep RHR per channel eliminates missed characters at 115.2 kbaud under interrupt latency >100 µs
Programmable multidrop mode 9-bit wake-up protocol with automatic address recognition - reduces polling overhead in RS-485 networks
Change-of-state detection Hardware edge-triggered latching on IP0–IP3 with CPU-readable IPCR register - replaces software polling for control signal transitions
Open-drain interrupt outputs OP4–OP7 configurable as RxRDY/TxRDY/FFULL signals - supports wired-OR interrupt buses without external logic
Power-down mode ICC reduced to ≤10 µA (typical) - extends battery life in portable serial gateways and low-power telemetry nodes

Applications

Industrial PLC Serial Interface Legacy Terminal Server

Use Scenario: Connecting Modbus RTU slaves to a central controller over RS-422 differential lines with galvanic isolation.

IC Role / Device Role / Timing Role: SCC2692AE1A44,529 acts as dual-channel line interface IC, handling simultaneous polling of two device groups with independent 19.2 kbaud and 38.4 kbaud rates.

Use Value: Quadruple buffering prevents character loss during 20 ms scan cycles; hardware flow control via OP0/OP1 RTS assertion avoids external handshaking logic.

Use Scenario: Aggregating serial console access from 8 ASCII terminals into a single Ethernet-to-serial gateway.

IC Role / Device Role / Timing Role: SCC2692AE1A44,529 serves as dual-port UART concentrator, with Channel A managing local debug port and Channel B bridging remote VT100 sessions.

Use Value: Multidrop mode enables wake-up addressing across shared RS-485 bus; receiver timeout mode detects idle terminals without CPU intervention.

Medical Device Data Logger Avionics Maintenance Interface

Use Scenario: Capturing diagnostic telemetry from ECG and SpO₂ modules via isolated UART links in Class II medical equipment.

IC Role / Device Role / Timing Role: SCC2692AE1A44,529 provides fault-tolerant dual-channel receive path with framing/parity error detection and break signaling for emergency alerts.

Use Value: False start bit rejection and mid-character break detection ensure reliable alarm transmission even under EMI stress; industrial temp range (−40°C to +85°C) sustains operation in uncontrolled enclosures.

Use Scenario: Interfacing ARINC 429 transceivers and MIL-STD-1553 bus controllers to maintenance laptops via ruggedized RS-232 adapters.

IC Role / Device Role / Timing Role: SCC2692AE1A44,529 functions as protocol-transparent bridge, converting aircraft subsystem logs to ASCII streams with precise 16X oversampling for jitter immunity.

Use Value: On-chip crystal oscillator eliminates external timing components; 1X/16X clock selection matches legacy avionics baud standards (e.g., 4800/9600 baud) without external dividers.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual UART applications.

Alternative Part Technical Difference Application Difference Selection Advice
SCC2691AE1A44 Single-channel DUART; identical pinout and register map but only one UART channel and half the I/O port resources Suitable for cost-sensitive designs requiring only one serial port with identical timing and interrupt behavior Select when system requires only one full-duplex channel and PCB layout reuse is critical
TL16C550CPN Enhanced FIFO (16-byte depth), auto RTS/CTS flow control, and PCI-bus compatibility; different register layout and interrupt structure Preferred for PC-compatible ISA/PCI designs needing higher throughput and plug-and-play driver support Choose for new designs targeting Windows/Linux drivers; avoid for legacy SCC2692 firmware migration

Compared with SCC2692AE1A44,529, the SCC2691AE1A44 reduces channel count without altering timing or packaging, while the TL16C550CPN trades register compatibility for deeper FIFOs and modern OS integration - making the former ideal for footprint-constrained single-port upgrades and the latter better suited for high-throughput host interfaces.

Availability

SCC2692AE1A44,529 is available at Aetrix Electronics and suitable for industrial automation, legacy terminal infrastructure, and medical data acquisition systems requiring stable component supply across extended product lifecycles.

Supply support for SCC2692AE1A44,529 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors, formerly Philips Semiconductors, is a global leader in high-reliability mixed-signal ICs for industrial, automotive, and communications applications, with deep heritage in legacy interface solutions.

The SCC2692AE1A44,529 belongs to NXP's legacy communications interface portfolio, designed specifically for long-lifecycle embedded systems requiring pin-stable, register-compatible UART functionality in harsh environments.

FAQ

What is the maximum supported baud rate for SCC2692AE1A44,529?

The SCC2692AE1A44,529 supports a maximum standard baud rate of 115.2 kbaud per channel using its internal baud rate generator with a 3.6864 MHz crystal. Non-standard rates up to 115.2 kbaud are achievable via the 16-bit counter/timer, and external 1X or 16X clocks allow operation beyond that limit - subject to AC timing constraints on tRX and tTX (≤220 ns min pulse width).

Does SCC2692AE1A44,529 support hardware flow control?

Yes, SCC2692AE1A44,529 supports hardware flow control through dedicated input pins IP0 (CTSAN) and IP1 (CTSBN) for Channels A and B, respectively. When enabled, the transmitter halts mid-character if CTS goes high; it resumes after CTS returns low. RTS outputs OP0 and OP1 can be automatically deasserted post-transmission via mode register configuration.

Can SCC2692AE1A44,529 operate without an external crystal?

Yes, SCC2692AE1A44,529 can operate without a crystal by applying an external clock signal to the X1/CLK pin (2–4 MHz). The X2 pin may be left unconnected in this configuration. The on-chip oscillator is disabled when X1/CLK receives a valid external clock, and all timing circuits - including the baud rate generator and counter/timer - derive timing from that source.

How does the quadruple receiver buffer in SCC2692AE1A44,529 improve system reliability?

The quadruple receiver buffer in SCC2692AE1A44,529 holds four complete characters per channel before overrun occurs. This allows the host CPU up to ~3.5 ms (at 115.2 kbaud) to service interrupts between successive characters, significantly reducing missed data in interrupt-driven systems with moderate latency - especially critical in real-time industrial control loops where polling is impractical.

Is SCC2692AE1A44,529 RoHS compliant?

SCC2692AE1A44,529 was originally manufactured prior to RoHS enforcement and is not inherently RoHS-compliant. However, Aetrix Electronics supplies only traceable, tested units meeting current JEDEC J-STD-020 moisture sensitivity and Pb-free finish requirements where applicable; full RoHS documentation is available upon request for legacy-compliant builds.

SCC2692AE1A44,529 Specifications

Product attributes
Attribute value
Manufacturer:
NXP Semiconductors
Package/Case:
44-LCC (J-Lead)
Series:
-
Packaging:
Tube
Product Status:
Obsolete
Features:
Configurable GPIO, Internal Oscillator, Timer/Counter
Number of Channels:
2, DUART
FIFO's:
-
Protocol:
-
Data Rate (Max):
1Mbps
Voltage - Supply:
5V
With Auto Flow Control:
Yes
With IrDA Encoder/Decoder:
-
With False Start Bit Detection:
Yes
With Modem Control:
-
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
44-PLCC (16.59x16.59)

SCC2692AE1A44,529 FAQ

1.How can I place an order for SCC2692AE1A44,529 through Aetrix?

Please submit a Request for Quotation (RFQ) for SCC2692AE1A44,529 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SCC2692AE1A44,529 reliable?

The price and inventory of SCC2692AE1A44,529 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SCC2692AE1A44,529 is usually 5 days.

3.What payment methods are accepted for SCC2692AE1A44,529?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SCC2692AE1A44,529 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SCC2692AE1A44,529?

SCC2692AE1A44,529 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SCC2692AE1A44,529 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SCC2692AE1A44,529?

For technical support, including SCC2692AE1A44,529 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SCC2692AE1A44,529 requirements.

6.How does Aetrix verify that SCC2692AE1A44,529 is sourced from the original manufacturer or authorized distributors?

All SCC2692AE1A44,529 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SCC2692AE1A44,529 meets industry standards.

7.What is the process for return or replacement of SCC2692AE1A44,529?

All SCC2692AE1A44,529 units undergo pre-shipment inspection (PSI). If there is an issue with SCC2692AE1A44,529, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SCC2692AE1A44,529 part is unused and in its original packaging.

Return procedure for SCC2692AE1A44,529:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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