NXP Semiconductors SCC68681C1N40,112

Overview

SCC68681C1N40 from NXP Semiconductors (formerly Philips Semiconductors) is a dual-channel CMOS universal asynchronous receiver/transmitter (DUART) in a 40-pin DIP package, supporting independent full-duplex serial communication on Channels A and B with programmable baud rates up to 115.2 kbaud, quadruple-receiver buffering, and +5 V single-supply operation for industrial embedded control systems.

For engineers reviewing the SCC68681C1N40 datasheet, SCC68681C1N40 pinout, SCC68681C1N40 application, or SCC68681C1N40 equivalent, key selection considerations include its dual-channel asynchronous UART architecture, 40-pin DIP mechanical compatibility, S68000 bus interface support, and integrated 16-bit counter/timer with crystal oscillator - critical for legacy industrial controller upgrades and RS-232/RS-485 interface designs requiring deterministic timing and flow control.

Technical Context

The SCC68681C1N40 implements two independent UART channels sharing a common 8-bit bidirectional data bus (D0–D7), address decoding (A1–A4), and interrupt management (INTRN, IACKN). Each channel supports fully programmable framing (5–8 data bits, odd/even/no parity, 1/1.5/2 stop bits) and independent baud rate selection from 18 fixed rates or user-defined values via internal 16-bit counter/timer.

Its timing subsystem integrates an on-chip crystal oscillator (X1/CLK, X2), 16× baud-rate generator, and clock selectors enabling simultaneous use of different clock sources per channel - e.g., Channel A using crystal-derived timing while Channel B uses external 1× clock input (IP3/IP5). The 6-bit input port (IP0–IP5) includes change-of-state detection and internal 1–4 µA pull-ups; the 8-bit output port (OP0–OP7) supports individual bit set/reset and open-drain interrupt assignment (e.g., OP4 = RxRDYA, OP7 = TxRDYB).

Key Specifications

Pinout & Package

SCC68681C1N40 is housed in a plastic dual in-line package (DIP40) with 40 leads (600 mil width), featuring through-hole mounting, standard 0.1″ pin pitch, and compatibility with legacy socket-based designs. Pin functions are electrically identical to the PLCC44 variant but mapped to a 40-pin DIP footprint.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual asynchronous UART applications.

Compared with SCC68681E1N40, the SCC68681C1N40 offers identical electrical and functional behavior but targets commercial temperature operation - simplifying thermal design and cost in controlled environments. Versus TL16C550CIPN, it provides dual-channel integration and legacy bus compatibility at the expense of FIFO depth and voltage flexibility, making it optimal for retrofit and space-constrained dual-port applications.

Availability

SCC68681C1N40 is available at Aetrix Electronics and suitable for industrial PLC communication modules, legacy CNC machine controllers, and point-of-sale terminal baseboards requiring stable component supply across multi-year production cycles.

Supply support for SCC68681C1N40 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company formed from the spin-off of Philips Semiconductors in 2006, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.

The SCC68681 belongs to NXP's legacy communications interface product line, designed specifically for robust, long-lifecycle embedded systems requiring dual asynchronous serial channels with deterministic timing and minimal external components.

FAQ

What is the maximum baud rate supported by the SCC68681C1N40?

The SCC68681C1N40 supports a maximum baud rate of 115.2 kbaud using its internal 18-rate baud generator or user-defined rates derived from the 16-bit counter/timer. When operating in 16× clock mode, the maximum data transfer rate is 125 kB/sec; in 1× mode, it reaches 1 MB/sec. These limits are specified under +5 V ±5% supply and 0–70 °C conditions per the official Philips product data sheet dated 2004 Apr 06.

Does the SCC68681C1N40 include an on-chip oscillator?

Yes, the SCC68681C1N40 integrates an on-chip crystal oscillator circuit connected via X1/CLK (Pin 36) and X2 (Pin 37). It operates with a nominal 3.6864 MHz crystal but accepts external clock inputs at X1/CLK if preferred. The oscillator serves as the primary timing reference for the baud rate generator, counter/timer, and internal logic - eliminating the need for external clock generation circuitry in most implementations of the SCC68681C1N40.

How does the receiver FIFO work in the SCC68681C1N40?

The SCC68681C1N40 implements a three-character deep FIFO stack in each receiver channel, supplemented by the shift register for a total of four-stage buffering. Data is loaded into the topmost empty FIFO position upon valid character reception; RxRDY asserts when ≥1 character is present, and FFULL sets when all three positions are filled. Reading the Receive Holding Register (RHR) pops the top character and advances the read pointer - preserving data integrity without automatic clearing, as confirmed in the "Receiver FIFO" section of the 2004 product data sheet.

Can the SCC68681C1N40 operate in multidrop network configurations?

Yes, the SCC68681C1N40 supports multidrop wake-up mode via programmable Address/Data (A/D) bit insertion in transmitted characters and selective address recognition in received streams. When enabled (MR1A[4:3] or MR1B[4:3] = '11'), the receiver monitors incoming data continuously - asserting RxRDY only on address-tagged characters (A/D = 1) while discarding data-tagged ones (A/D = 0). This allows efficient polling reduction in distributed I/O systems using the SCC68681C1N40 as a slave interface.

What are the key differences between SCC68681C1N40 and SCC68681E1N40?

The SCC68681C1N40 and SCC68681E1N40 share identical functionality, pinout, and electrical specifications except for temperature and supply voltage ratings: the 'C' suffix denotes commercial grade (0 °C to +70 °C, +5 V ±5%), while the 'E' suffix indicates industrial grade (–40 °C to +85 °C, +5 V ±10%). Both use the same DIP40 package (SOT129-1) and are manufactured by NXP Semiconductors (formerly Philips). No firmware or hardware changes are needed when substituting SCC68681C1N40 with SCC68681E1N40 beyond thermal validation.