Microchip Technology SCH3114I-NU
- Part No.:
- SCH3114I-NU
- Manufacturer:
- Microchip Technology
- Category:
- Specialized
- Package:
- 128-TQFP
- Datasheet:
-
SCH3114I-NU.pdf
- Description:
- IC INTFACE SPECIALIZED 128VTQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,972
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Product details
Overview
SCH3114I-NU from Microchip Technology is an industrial-grade LPC Super I/O controller integrating keyboard/mouse control, four NS16550-compatible UARTs, IEEE 1284 EPP/ECP parallel port, 2.88MB floppy disk controller, hardware monitoring, and programmable clock output. It operates at 3.3V (SIO block 5V tolerant), supports ACPI 2.0 and PC99/PC2001 standards, and delivers full legacy I/O functionality for embedded x86 motherboard designs.
For engineers reviewing the SCH3114I-NU datasheet, SCH3114I-NU pinout, SCH3114I-NU application, or SCH3114I-NU equivalent, this page provides verified technical context, validated pin assignments, real-world use cases in industrial control and legacy-compliant systems, and confirmed alternative parts with documented functional differences.
Technical Context
The SCH3114I-NU implements a Low Pin Count (LPC) bus interface compliant with 19–33 MHz operation and ISA Plug-and-Play register mapping. Its integrated 8042-compatible keyboard controller includes 2 kB ROM and 256 B RAM, while the four serial ports each feature 16-byte FIFOs, support up to 1.5 Mbps baud rates, and enable IRQ sharing.
Hardware monitoring includes three fan tachometer inputs, three PWM outputs, six analog voltage inputs (+2.5V, +5V, +12V, Vccp, VCC, Vbat), dual thermal diode sensing (±1.5°C accuracy), and internal ambient temperature measurement - all accessible via LPC and capable of generating nHWM_INT and THERMTRIP signals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| LPC Bus Frequency | 19–33 MHz - defines maximum host-to-SIO data throughput and timing margin for legacy system integration. |
| Serial Ports | 4 × full-function NS16550-compatible UARTs - enables concurrent RS232/RS485 interfaces with 16-byte FIFOs and 1.5 Mbps max rate. |
| Floppy Controller | CMOS 765B core with 16-byte FIFO and vertical recording support - ensures 100% IBM PC/AT software compatibility and overrun/underrun detection. |
| Hardware Monitor Inputs | 6 voltage channels, 2 thermal diode inputs, 1 internal sensor - allows comprehensive power rail and thermal validation without external ICs. |
| GPIO Count | 40 general-purpose I/O pins, including 6 VID-compatible inputs - supports system-level configuration, LED control, and processor voltage identification. |
| Package | 128-pin VTQFP (14×14×1.0 mm, 2 mm footprint) - RoHS-compliant surface-mount package with standard thermal and mechanical mounting characteristics. |
| Temperature Range | Industrial: –40°C to +85°C - qualified for deployment in uncontrolled environments such as factory automation and transportation systems. |
Pinout & Package
128-pin VTQFP (14×14×1.0 mm body, 2 mm footprint), RoHS-compliant, lead-free finish. Pin assignments are defined per Microchip DS00001730A, pages 6 and 12–22 (LPC, GPIO, UART, FDC, KBC, HWM, and reset signal groups).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| LPC_CLK | LPC Bus Clock Input | Accepts 19–33 MHz system clock; synchronizes all LPC transactions between host and SCH3114I-NU. |
| LPC_FRAME# | LPC Bus Frame Signal | Indicates start/end of LPC bus transaction; active-low, open-drain compatible with chipset timing requirements. |
| LPC_RST# | LPC Reset Input | Asynchronous reset input that clears internal registers and forces reinitialization of LPC interface logic. |
| GPIO[0:39] | General Purpose I/O | Configurable as input/output with pull-up/down; 6 pins support VID voltage level detection for CPU core voltage identification. |
| UART1_TXD / UART1_RXD | Serial Port 1 Data | Dedicated full-duplex TTL-level transmit/receive lines for first NS16550-compatible UART channel. |
| HWM_THERM_A / HWM_THERM_B | External Thermal Diode Inputs | Differential inputs for connecting remote thermal diodes; enable ±1.5°C accurate CPU and chipset temperature monitoring. |
| nHWM_INT | Hardware Monitor Interrupt Output | Open-drain active-low signal asserted when any monitored voltage, temperature, or fan speed exceeds programmed limits. |
Key Features
| Feature | Design Value |
|---|---|
| ACPI 2.0 & PC99/PC2001 Compliance | Enables seamless integration into legacy BIOS and UEFI firmware stacks with standardized power-state transitions and device enumeration. |
| Programmable Clock Output (16 Hz) | Provides precise low-frequency timing reference for RTC or watchdog timer synchronization without external crystal. |
| Security Key Register (32-byte) | Allows secure storage of device-authentication keys for firmware integrity verification and anti-cloning protection. |
| IDE/PCI Reset Outputs | Two dedicated reset buffers with software control - simplifies motherboard reset sequencing for storage and expansion devices. |
| Power Button & AC Fail Recovery | Hardware-assisted power-on detection and graceful shutdown response to AC loss - critical for industrial UPS-backed systems. |
Applications
| Industrial Control Panel | Legacy Medical Diagnostic Equipment |
|---|---|
|
Use Scenario: Fan-cooled PLC rack with isolated serial communication to sensors, parallel printer interface for report generation, and real-time voltage/temperature supervision. IC Role / Device Role / Timing Role: Central Super I/O hub managing UARTs, parallel port, hardware monitor, and reset generation under ACPI-compliant power management. Use Value: Eliminates discrete UARTs, FDC, and monitoring ICs; reduces BOM count by 7+ components while maintaining full IBM PC/AT compatibility. |
Use Scenario: Floor-standing imaging device requiring PS/2 keyboard/mouse, dual serial ports for modality control, and thermal safety shutdown on CPU overtemperature. IC Role / Device Role / Timing Role: Integrated keyboard controller (8042-compatible), four UARTs, and dual thermal diode monitoring with THERMTRIP pulse output. Use Value: Enables certified Class II medical device design with single-chip I/O consolidation and fail-safe thermal response within –40°C to +85°C operating range. |
| Ruggedized Transportation Terminal | Embedded Point-of-Sale (POS) System |
|
Use Scenario: In-vehicle ticketing kiosk exposed to wide temperature swings, requiring reliable floppy boot media support, serial modem connectivity, and battery-backed RTC supervision. IC Role / Device Role / Timing Role: Floppy disk controller with vertical recording format, 480 I/O address options, and Vbat-supervised security key register for firmware authentication. Use Value: Supports legacy boot-from-floppy requirement while providing robust power failure recovery and tamper-resistant key storage for payment application integrity. |
Use Scenario: Compact retail terminal with PS/2 keyboard, receipt printer (ECP mode), barcode scanner (RS485 auto-direction), and fan-cooled enclosure. IC Role / Device Role / Timing Role: Multi-mode parallel port with ChiProtect™ ESD hardening, RS485-capable UART with automatic RTS control, and programmable fan PWM outputs. Use Value: Delivers drop-in replacement for aging Super I/O solutions with enhanced reliability in high-noise retail environments and simplified thermal management. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Super I/O controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ITE IT8786E | 48-pin QFP; supports only 2 serial ports; no floppy controller; lacks VID-compatible GPIOs and IDE/PCI reset outputs. | Targeted at cost-sensitive consumer motherboards; not suitable for industrial systems requiring floppy boot or multi-rail voltage monitoring. | Select only if application omits floppy, requires fewer UARTs, and operates in commercial temperature range. |
| Nuvoton NCT6776D | 128-pin LQFP; includes integrated TPM interface and SMBus master; adds USB 2.0 transceiver but removes PS/2 keyboard controller and floppy support. | Designed for modern UEFI platforms with security-first architecture; incompatible with legacy BIOS-based PS/2 or FDD-dependent boot flows. | Choose when migrating to TPM-enabled, USB-centric designs and abandoning PS/2/floppy dependencies. |
Compared with SCH3114I-NU, IT8786E reduces integration depth (no FDC, fewer UARTs, no VID/GPIO flexibility), while NCT6776D shifts focus toward security and USB at the expense of legacy I/O - making SCH3114I-NU uniquely suited for industrial x86 systems requiring full backward compatibility and extended temperature operation.
Availability
SCH3114I-NU is available at Aetrix Electronics and suitable for industrial control panels, legacy medical diagnostic equipment, and ruggedized transportation terminals requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for SCH3114I-NU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and interface ICs, with a strong heritage in embedded control and system-level integration.
The SCH3114I-NU belongs to Microchip's LPC Super I/O product line, designed specifically to consolidate legacy PC I/O functions - including keyboard, serial, parallel, floppy, and hardware monitoring - into a single, ACPI-compliant, industrial-qualified device for x86-based embedded platforms.
FAQ
What is the operating voltage range for the SCH3114I-NU?
The SCH3114I-NU operates from a nominal 3.3V supply for core logic, while its Super I/O block is 5V tolerant - enabling direct interfacing with legacy 5V peripherals such as PS/2 keyboards and parallel printers without level-shifting circuitry. This dual-voltage capability is explicitly specified in Microchip DS00001730A, page 1, and applies to all pins marked as 5V-tolerant in the pinout table. The SCH3114I-NU maintains full functionality across its industrial temperature range (–40°C to +85°C) under these conditions.
Does the SCH3114I-NU include a floppy disk controller, and what standards does it support?
Yes, the SCH3114I-NU integrates a licensed CMOS 765B floppy disk controller supporting 2.88 MB capacity, two floppy drives, vertical recording format, and 100% IBM PC/XT and PC/AT software compatibility. It features a 16-byte data FIFO, overrun/underrun detection, and sophisticated power control circuitry (PCC) with multiple powerdown modes. These capabilities are confirmed in DS00001730A, pages 1 and 3, and distinguish the SCH3114I-NU from newer Super I/O devices that omit floppy support entirely.
How many serial ports does the SCH3114I-NU provide, and what UART compatibility do they offer?
The SCH3114I-NU provides four full-function serial ports, each implemented as an NS16550-compatible UART with 16-byte send/receive FIFOs, programmable baud rate generator, and support for data rates up to 1.5 Mbps. They also support RS485 auto-direction control, IRQ sharing, and modem control circuitry. This specification is explicitly differentiated from the SCH3112 (2 ports) and SCH3116 (6 ports) in Table 1 of DS00001730A, page 4, confirming the SCH3114I-NU's exact 4-port configuration.
What hardware monitoring capabilities does the SCH3114I-NU support?
The SCH3114I-NU monitors six voltage rails (+2.5V, +5V, +12V, Vccp, VCC, Vbat), internal ambient temperature, and two external temperatures via thermal diode inputs (±1.5°C accuracy). It includes three fan tachometer inputs, three PWM outputs for automatic fan control, and generates interrupt (nHWM_INT) and shutdown (THERMTRIP) signals on out-of-limit conditions. All monitoring functions are LPC-accessible and detailed in DS00001730A, pages 2–3.
Is the SCH3114I-NU pin-compatible with other members of the SCH311x family?
No - while SCH3112, SCH3114, and SCH3116 share the same 128-pin VTQFP package and LPC interface, their functional pinouts differ significantly due to variant-specific features: SCH3112 lacks IDE/PCI reset outputs and power button control, SCH3116 adds two 4-pin serial ports and removes IDE/PCI reset, and only SCH3114I-NU implements the full 4-UART + IDE/PCI reset + power button feature set. Pin compatibility is not claimed in DS00001730A, and register-level configuration must be validated per device.
SCH3114I-NU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 128-TQFP
- Packaging:
- Tray
- Product Status:
- Active
- Applications:
- Controller
- Interface:
- LPC
- Voltage - Supply:
- 3.3V
- Supplier Device Package:
- 128-VTQFP (14x14)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
SCH3114I-NU FAQ
1.How can I place an order for SCH3114I-NU through Aetrix?
Please submit a Request for Quotation (RFQ) for SCH3114I-NU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SCH3114I-NU reliable?
The price and inventory of SCH3114I-NU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SCH3114I-NU is usually 5 days.
3.What payment methods are accepted for SCH3114I-NU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SCH3114I-NU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SCH3114I-NU?
SCH3114I-NU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SCH3114I-NU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SCH3114I-NU?
For technical support, including SCH3114I-NU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SCH3114I-NU requirements.
6.How does Aetrix verify that SCH3114I-NU is sourced from the original manufacturer or authorized distributors?
All SCH3114I-NU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SCH3114I-NU meets industry standards.
7.What is the process for return or replacement of SCH3114I-NU?
All SCH3114I-NU units undergo pre-shipment inspection (PSI). If there is an issue with SCH3114I-NU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SCH3114I-NU part is unused and in its original packaging.
Return procedure for SCH3114I-NU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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