NXP Semiconductors SE97BTP,547

Overview

SE97BTP,547 from NXP Semiconductors is a JEDEC JC-42.4-compliant DDR memory module temperature sensor with integrated 256-byte SPD EEPROM, delivering ±1 °C max accuracy in the +75 °C to +95 °C critical zone, 11-bit ΔΣ ADC resolution of 0.125 °C, and I²C/SMBus interface up to 400 kHz - deployed on DDR3 DIMMs for real-time DRAM thermal monitoring and vendor data storage.

For engineers reviewing the SE97BTP,547 datasheet, SE97BTP,547 pinout, SE97BTP,547 application, or SE97BTP,547 equivalent, this page delivers verified thermal sensing accuracy, EVENT output configuration options (comparator/interrupt/critical-only), SMBus TIMEOUT and ALERT support, EEPROM write protection modes, and HWSON8 package integration details essential for DIMM design compliance and system-level thermal management.

Technical Context

The SE97BTP,547 integrates a local temperature sensor and 256-byte EEPROM on a single die, sharing an I²C/SMBus interface with programmable slave addresses (A0–A2) supporting up to eight devices per bus. Its 11-bit ΔΣ ADC updates temperature readings at ≥8 Hz (125 ms conversion period), latching results into a 16-bit temperature register with MSB-first transmission.

Thermal event signaling uses an open-drain EVENT pin configurable as active-HIGH/LOW comparator output or microprocessor interrupt, with independent upper/lower alarm and critical trip thresholds (02h–04h registers), hysteresis (0–6 °C), and SMBus TIMEOUT (25–35 ms). The EEPROM supports permanent/reversible software write protection for lower 128 bytes (00h–7Fh), while upper 128 bytes (80h–FFh) remain freely writable.

Key Specifications

Pinout & Package

SE97BTP,547 is housed in a 2 mm × 3 mm × 0.8 mm HWSON8 (SOT1069-2) thermally enhanced thin-outline package with exposed pad for improved heat dissipation on DDR modules.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar DDR memory module temperature sensing applications.

Compared with SE97BTP,547, SE98BTP,547 removes EEPROM to reduce cost and complexity where SPD is unnecessary, while LM75BIMM/NOPB offers broader industrial temperature range but lacks JEDEC compliance, EEPROM, and SMBus features critical for DDR3 DIMM integration.

Availability

SE97BTP,547 is available at Aetrix Electronics and suitable for DDR3 memory modules, enterprise servers, and network equipment requiring stable component supply, JEDEC-compliant thermal monitoring, and integrated SPD EEPROM functionality.

Supply support for SE97BTP,547 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company specializing in secure connectivity solutions for automotive, industrial, and communications markets, with leadership in embedded processing and analog technologies.

The SE97BTP,547 belongs to NXP's JEDEC-compliant thermal sensor product line, designed specifically to meet DDR3 DIMM memory module requirements for integrated temperature sensing and Serial Presence Detect functionality.

FAQ

What is the primary function of the SE97BTP,547 in DDR3 memory modules?

The SE97BTP,547 serves as a JEDEC JC-42.4-compliant thermal sensor and integrated Serial Presence Detect (SPD) EEPROM for DDR3 DIMMs. It continuously monitors DRAM temperature with ±1 °C max accuracy in the critical +75 °C to +95 °C range while storing vendor-specific memory module data in its 256-byte EEPROM. This dual functionality replaces discrete sensor + EEPROM solutions, reducing component count and ensuring compliance with industry thermal management standards for DDR3 systems.

Does the SE97BTP,547 support SMBus TIMEOUT and ALERT features?

Yes, the SE97BTP,547 supports both SMBus TIMEOUT (programmable 25–35 ms) and SMBus ALERT Response Address (ARA). TIMEOUT prevents system lock-ups if the host holds SCL low too long, while ALERT enables multi-device interrupt arbitration on shared buses. These features are enabled by default in the SMBUS register and can be disabled or configured via I²C writes. The SE97BTP,547 responds to ARA only in Interrupt mode with active-LOW EVENT polarity, making it suitable for complex server and networking platforms requiring coordinated thermal event handling.

How is EEPROM write protection implemented in the SE97BTP,547?

The SE97BTP,547 implements two-tier EEPROM write protection: the lower 128 bytes (00h–7Fh) support Permanent Write Protect (PWP) or Reversible Write Protect (RWP) via software commands, safeguarding critical SPD data like vendor ID and memory timings. The upper 128 bytes (80h–FFh) remain unprotected for general-purpose use. RWP activation requires driving the A0 pin above 7.0 V to enter reversible protection mode, while PWP is irreversible and locks the region permanently. This architecture ensures DRAM module identity and configuration integrity while allowing field-updatable application data storage.

What are the key differences between SE97BTP,547 and SE98BTP,547?

The SE97BTP,547 integrates both a temperature sensor and 256-byte EEPROM in one die, whereas the SE98BTP,547 contains only the thermal sensor with identical accuracy, resolution, and I²C interface but no EEPROM. Both share the same HWSON8 package, pinout, and JEDEC JC-42.4 compliance. The SE97BTP,547 is used where SPD data storage is required on-die; the SE98BTP,547 is selected when SPD is handled externally or omitted entirely, reducing cost and power consumption while retaining full thermal monitoring capability.

Can the EVENT output of the SE97BTP,547 be configured for different thermal response behaviors?

Yes, the EVENT output of the SE97BTP,547 is fully configurable via the Configuration register (01h). It supports three distinct modes: Comparator mode (continuous assertion outside alarm window), Interrupt mode (edge-triggered assertion on threshold crossing, clearable via register bit), and Critical-only mode (assertion only at TCRIT). Polarity (active-HIGH/LOW), hysteresis (0–6 °C), and lockability of alarm bands are also software-selectable. This flexibility allows the SE97BTP,547 to serve as either a simple thermostat output or a precise microprocessor interrupt source depending on system architecture requirements.