NXP Semiconductors SE97TL,128

Overview

SE97TL,128 from NXP Semiconductors is a JEDEC JC-42.4-compliant DDR memory module temperature sensor with integrated 256-byte SPD EEPROM, operating from −40 °C to +125 °C with ±1 °C (max) accuracy between +75 °C and +95 °C, 11-bit ΔΣ ADC resolution of 0.125 °C, and I²C/SMBus interface up to 400 kHz - deployed on SO-DIMMs for DRAM case temperature estimation and thermal throttling control in thin-and-light notebooks.

For engineers reviewing the SE97TL,128 datasheet, SE97TL,128 pinout, SE97TL,128 application, or SE97TL,128 equivalent, key selection considerations include its HXSON8 package (2 mm × 3 mm × 0.5 mm), software-write-protected EEPROM architecture, programmable EVENT output polarity and hysteresis, SMBus TIMEOUT/ALERT support, and JEDEC-grade B thermal accuracy across DDR3 RDIMM/ECC platforms.

Technical Context

The SE97TL,128 integrates a local ΔΣ temperature sensor and 256-byte serial EEPROM on a single die, sharing I²C/SMBus pins (SCL/SDA) and using three address pins (A0–A2) to support up to eight devices per bus. Its EVENT output operates as an open-drain comparator or interrupt signal, configurable via the CONFIG register for critical/upper/lower trip points with hysteresis options (0 °C, 1.5 °C, 3 °C, 6 °C).

It implements JEDEC JC-42.4 Mobile Platform Memory Module Temperature Sensor requirements, with EEPROM split into lower 128 bytes (00h–7Fh) supporting Permanent or Reversible Write Protection and upper 128 bytes (80h–FFh) for general-purpose storage. SMBus TIMEOUT (25–35 ms) and ALERT Response Address (ARA) are enabled by default to prevent bus lock-up and enable multi-device interrupt arbitration.

Key Specifications

Pinout & Package

SE97TL,128 is housed in an HXSON8 package (JEDEC PSON8 VCED-3): 2 mm × 3 mm × 0.5 mm, no leads, 8-terminal thermal-enhanced ultra-thin outline, optimized for space-constrained DIMM mounting.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar DDR memory module temperature sensing applications.

Compared with SE97TL,128, SE98T,118 offers marginally better typical accuracy but removes default ARA support, while LM75BIMM/NOPB lacks SPD EEPROM, JEDEC compliance, and critical thermal grading - making SE97TL,128 the only drop-in solution for DDR3 RDIMM/ECC thermal + SPD requirements.

Availability

SE97TL,128 is available at Aetrix Electronics and suitable for DDR3 RDIMM thermal monitoring, laptop SO-DIMM thermal throttling, and enterprise server memory module management requiring stable component supply across long-lifecycle deployments.

Supply support for SE97TL,128 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and communication infrastructure markets.

The SE97TL,128 belongs to NXP's JEDEC-compliant thermal sensor product line, designed specifically to meet DDR2/DDR3 memory module temperature sensing and Serial Presence Detect (SPD) requirements in high-density computing platforms.

FAQ

What is the primary application of the SE97TL,128?

The SE97TL,128 is primarily used as a JEDEC JC-42.4-compliant temperature sensor and integrated SPD EEPROM on DDR3 RDIMM and SO-DIMM modules. It enables accurate DRAM case temperature estimation and dynamic thermal throttling in laptops, servers, and enterprise systems - replacing legacy discrete SPD and temp sensor solutions with a single-die, space-optimized component.

Does the SE97TL,128 support SMBus TIMEOUT and ALERT functions?

Yes, the SE97TL,128 supports both SMBus TIMEOUT (25–35 ms) and ALERT Response Address (ARA) functions. TIMEOUT prevents bus lock-up by resetting the internal state machine if SCL is held low too long. ARA is enabled by default and allows the SE97TL,128 to respond to host-initiated alert polling when configured in interrupt mode with active-low EVENT polarity - essential for multi-device thermal interrupt arbitration.

What is the EEPROM organization and protection scheme of the SE97TL,128?

The SE97TL,128 contains 256 bytes of EEPROM organized as one block (00h–FFh). The lower 128 bytes (00h–7Fh) support Permanent Write Protection (PWP) or Reversible Write Protection (RWP) via software commands, securing DRAM vendor and timing data. The upper 128 bytes (80h–FFh) are unprotected and available for general-purpose storage - enabling flexible use of SPD space while maintaining JEDEC compliance.

How does the EVENT output of the SE97TL,128 operate in comparator versus interrupt mode?

In comparator mode, the SE97TL,128's EVENT output asserts continuously when temperature exceeds upper/lower boundaries or critical threshold - ideal for thermostat-style fan control. In interrupt mode, EVENT pulses on boundary crossing and must be cleared via CONFIG register bit CEVNT; it reasserts only on subsequent crossings. Critical temperature events remain asserted until temperature drops below threshold, regardless of CEVNT status - ensuring fail-safe thermal shutdown signaling.

What package type and dimensions does the SE97TL,128 use?

The SE97TL,128 uses the HXSON8 package (JEDEC PSON8 VCED-3), measuring 2.0 mm × 3.0 mm × 0.5 mm with 8 terminals and no leads. This thermal-enhanced, extremely thin small-outline package is optimized for surface-mount on DDR memory modules, offering superior heat dissipation and minimal PCB footprint compared to TSSOP8 or HVSON8 variants - confirmed in NXP's ordering information table for SE97TL.