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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Thermal Management

NXP Semiconductors SE97TL,147

Name: SE97TL,147
Brand: NXP Semiconductors
SKU: SE97TL,147
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SE97TL,147

Manufacturer:: NXP Semiconductors

Category:: Thermal Management

Package:: 8-XFDFN Exposed Pad

Datasheet:: SE97TL,147.pdf

Description:: IC TEMP SENSOR DDR 3.3V 8-HXSON

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Product details

Overview

SE97TL,147 from NXP Semiconductors is a JEDEC JC-42.4-compliant DDR memory module temperature sensor with integrated 256-byte SPD EEPROM, operating from −40 °C to +125 °C with ±1 °C (max) accuracy between +75 °C and +95 °C, 11-bit ΔΣ ADC resolution of 0.125 °C, and I²C/SMBus interface up to 400 kHz - deployed directly on SO-DIMM/UDIMM modules for DRAM case temperature estimation and thermal throttling control in thin-and-light notebooks.

For engineers reviewing the SE97TL,147 datasheet, SE97TL,147 pinout, SE97TL,147 application, or SE97TL,147 equivalent, this page delivers verified JEDEC-grade thermal sensing specs, EVENT output configuration modes, EEPROM write-protection behavior, HXSON8 package details, and DIMM-specific register initialization requirements - all grounded in NXP's Rev. 07 product data sheet.

Technical Context

The SE97TL,147 integrates a local temperature sensor and 256-byte serial EEPROM on a single die, sharing I²C/SMBus pins (SCL/SDA) and using three address pins (A0–A2) to support up to eight devices per bus. Its ΔΣ ADC performs 8 Hz conversions (125 ms period), latching readings into a 16-bit temperature register updated 10 times per second.

It implements three configurable EVENT output modes - comparator, interrupt, and critical-only - driven by programmable upper/lower alarm trip points (02h/03h) and critical trip point (04h), with hysteresis options (0 °C, 1.5 °C, 3 °C, 6 °C) and polarity selection. The EEPROM supports permanent/reversible software write protection for lower 128 bytes (00h–7Fh), while upper 128 bytes (80h–FFh) remain freely writable.

Key Specifications

Parameter	Value and Actual Design Meaning
Temperature Range	−40 °C to +125 °C operational range; enables full coverage of DDR3 RDIMM/ECC module thermal environments.
Accuracy (B Grade)	±1 °C (max) from +75 °C to +95 °C; meets JEDEC JC-42.4 TSE 2002B3 specification for mobile platform memory modules.
ADC Resolution	0.125 °C (11-bit); provides fine-grained thermal feedback for dynamic memory refresh scaling and precise throttling decisions.
I²C/SMBus Speed	0 Hz to 400 kHz; supports Fast-mode I²C and SMBus timing, including TIMEOUT and ALERT Response Address (ARA) features.
EEPROM Endurance	100,000 write/erase cycles with 10-year data retention; ensures reliable SPD updates across memory module lifecycle.
Supply Voltage	VDD = 3.0 V to 3.6 V (sensor & EEPROM write); EEPROM read functional down to 1.7 V - supports low-voltage DIMM power sequencing.
Shutdown Current	5.0 μA (max); minimizes standby power draw during system sleep states without disabling thermal monitoring capability.

Pinout & Package

SE97TL,147 is housed in an HXSON8 package (JEDEC PSON8 VCED-3): 2 mm × 3 mm × 0.5 mm body, no leads, 8-terminal thermal-enhanced ultra-thin outline - optimized for space-constrained DIMM mounting.

Pin/Terminal	Circuit Role	Design Meaning
A0	I²C slave address bit 0	Internally pulled down; overvoltage tolerant to 10 V for software write protection activation - enables reversible EEPROM lock without hardware changes.
A1	I²C slave address bit 1	Internally pulled down; selects one of eight possible I²C addresses (0011b + A2:A1:A0) on shared DIMM bus.
A2	I²C slave address bit 2	Internally pulled down; completes 3-bit address encoding for multi-device DIMM topology support.
VSS	Ground reference	Common return path for analog sensor, digital logic, and EEPROM - requires low-impedance PCB connection to minimize noise coupling.
SDA	I²C bidirectional data line	Open-drain I/O requiring external pull-up; carries temperature data, EEPROM contents, and configuration registers via SMBus protocol.
SCL	I²C clock input	Open-drain input synchronized to host controller; supports SMBus TIMEOUT (25–35 ms) to prevent bus lockup during firmware hangs.
EVENT	Thermal alarm output	Open-drain output configurable as active-HIGH/LOW comparator or interrupt; asserts on crossing upper/lower/critical thresholds - drives motherboard PMIC or baseboard management controller.
VDD	Power supply	3.0–3.6 V nominal; powers both sensor and EEPROM; EEPROM read remains functional at 1.7 V - accommodates brown-out conditions during DIMM power ramp.

Key Features

Feature	Design Value
JEDEC JC-42.4 Compliance	Guarantees interoperability with DDR3 RDIMM/ECC memory modules and compatibility with Intel Nehalem+ BIOS thermal management stacks.
Configurable EVENT Output Modes	Three distinct behaviors - comparator (latched alarm), interrupt (edge-triggered), and critical-only - enable flexible integration with host OS power management and hardware throttling logic.
EEPROM Write Protection	Software-selectable Permanent (PWP) or Reversible (RWP) lock for lower 128 bytes (00h–7Fh), preserving vendor SPD data while allowing field updates to upper 128 bytes (80h–FFh).
ΔΣ ADC Conversion Rate	8 Hz (125 ms period) with automatic fallback to previous reading during SMBus reads - ensures continuous valid temperature availability without bus stalls.
SMBus TIMEOUT & ALERT Support	Prevents system lockups via automatic state-machine reset on SCL hold >25 ms; ARA allows coordinated interrupt handling with other SMBus slaves on same DIMM channel.

Applications

DDR3 RDIMM Thermal Monitoring	Laptop Memory Throttling Control
Use Scenario: Mounted directly on registered DDR3 memory modules to monitor DRAM die temperature under sustained bandwidth load. IC Role / Device Role / Timing Role: Local temperature sensor providing real-time Tcase estimation to chipset for dynamic memory traffic throttling - replacing ambient motherboard sensor inputs. Use Value: Enables up to 30 % higher sustained memory bandwidth in thin-and-light notebooks by basing throttling on actual DIMM temperature rather than worst-case ambient assumptions.	Use Scenario: Integrated into SO-DIMM modules used in ultrabooks and 2-in-1 convertibles with dual-channel DDR3 configurations. IC Role / Device Role / Timing Role: Dual-function device acting as both JEDEC-compliant thermal sensor and Serial Presence Detect (SPD) EEPROM - eliminating need for separate SPD ICs. Use Value: Reduces BOM count and PCB footprint while meeting JEDEC JC-42.4 Mobile Platform Memory Module specification for thermal-aware memory subsystems.
Server DIMM Health Management	Enterprise Storage Memory Modules
Use Scenario: Deployed on ECC-capable RDIMMs in rack-mounted servers where memory reliability and thermal derating are critical for uptime SLAs. IC Role / Device Role / Timing Role: Critical temperature event generator feeding BMC/IPMI firmware to trigger proactive fan speed increases or memory frequency reduction before Tcase exceeds 85 °C. Use Value: Supports predictive thermal management policies that extend DRAM lifetime and reduce uncorrectable error rates in high-density compute environments.	Use Scenario: Used in enterprise SSD cache modules and RAID controller memory buffers where thermal runaway can cause data corruption or controller resets. IC Role / Device Role / Timing Role: Provides hysteresis-configurable alarm window (upper/lower trip points) and non-clearable critical output - enabling tiered response to gradual vs. rapid temperature excursions. Use Value: Allows storage firmware to distinguish between transient hotspots and sustained overheating, minimizing false-positive throttling while ensuring hard thermal limits are never breached.

DDR3 RDIMM Thermal Monitoring

Laptop Memory Throttling Control

Use Scenario: Mounted directly on registered DDR3 memory modules to monitor DRAM die temperature under sustained bandwidth load.

IC Role / Device Role / Timing Role: Local temperature sensor providing real-time Tcase estimation to chipset for dynamic memory traffic throttling - replacing ambient motherboard sensor inputs.

Use Value: Enables up to 30 % higher sustained memory bandwidth in thin-and-light notebooks by basing throttling on actual DIMM temperature rather than worst-case ambient assumptions.

Use Scenario: Integrated into SO-DIMM modules used in ultrabooks and 2-in-1 convertibles with dual-channel DDR3 configurations.

IC Role / Device Role / Timing Role: Dual-function device acting as both JEDEC-compliant thermal sensor and Serial Presence Detect (SPD) EEPROM - eliminating need for separate SPD ICs.

Use Value: Reduces BOM count and PCB footprint while meeting JEDEC JC-42.4 Mobile Platform Memory Module specification for thermal-aware memory subsystems.

Server DIMM Health Management

Enterprise Storage Memory Modules

Use Scenario: Deployed on ECC-capable RDIMMs in rack-mounted servers where memory reliability and thermal derating are critical for uptime SLAs.

IC Role / Device Role / Timing Role: Critical temperature event generator feeding BMC/IPMI firmware to trigger proactive fan speed increases or memory frequency reduction before Tcase exceeds 85 °C.

Use Value: Supports predictive thermal management policies that extend DRAM lifetime and reduce uncorrectable error rates in high-density compute environments.

Use Scenario: Used in enterprise SSD cache modules and RAID controller memory buffers where thermal runaway can cause data corruption or controller resets.

IC Role / Device Role / Timing Role: Provides hysteresis-configurable alarm window (upper/lower trip points) and non-clearable critical output - enabling tiered response to gradual vs. rapid temperature excursions.

Use Value: Allows storage firmware to distinguish between transient hotspots and sustained overheating, minimizing false-positive throttling while ensuring hard thermal limits are never breached.

Equivalent & Alternatives

The following parts are listed as comparable options for similar DDR memory module temperature sensing applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
NCP1022DR2G	Single-function temperature sensor only (no EEPROM); ±1.5 °C accuracy over −40 °C to +125 °C; 2.7–5.5 V supply; lacks SMBus TIMEOUT and ARA support.	Requires external SPD EEPROM; suitable for cost-sensitive DDR2 modules where JEDEC JC-42.4 compliance is not mandated.	Select when SPD functionality is handled separately and wider VDD range is needed - not drop-in compatible due to missing EEPROM and different register map.
AT30TS74-MA8Y-T	Integrated 256-byte EEPROM and ±0.5 °C (max) accuracy from 0 °C to +70 °C; supports I²C up to 1 MHz; no SMBus ALERT or TIMEOUT; hysteresis fixed at 1.5 °C.	Targeted at industrial embedded systems; lacks JEDEC JC-42.4 qualification and critical-only EVENT mode - unsuitable for DDR3 RDIMM thermal management stacks.	Consider only for non-JEDEC DIMM designs requiring higher I²C speed and tighter accuracy below 70 °C - requires firmware adaptation for missing SMBus features.

Compared with NCP1022DR2G and AT30TS74-MA8Y-T, SE97TL,147 uniquely combines JEDEC JC-42.4 compliance, SMBus TIMEOUT/ALERT, reversible EEPROM write protection, and critical-only EVENT mode - making it the only qualified solution for DDR3 RDIMM/ECC thermal sensing with integrated SPD.

Availability

SE97TL,147 is available at Aetrix Electronics and suitable for DDR3 RDIMM thermal monitoring, laptop SO-DIMM throttling control, and enterprise server memory health management requiring stable component supply, JEDEC qualification traceability, and long-term DIMM lifecycle support.

Supply support for SE97TL,147 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and communication infrastructure markets, with deep expertise in mixed-signal sensor ICs and memory interface technologies.

The SE97TL,147 belongs to NXP's JEDEC-compliant thermal sensor product line, engineered specifically to meet JC-42.4 Mobile Platform Memory Module requirements - delivering integrated temperature sensing and SPD EEPROM functionality for DDR2/DDR3 memory modules.

FAQ

What is the primary application of the SE97TL,147?

The SE97TL,147 is primarily used as a JEDEC JC-42.4-compliant temperature sensor and Serial Presence Detect (SPD) EEPROM on DDR3 RDIMM and SO-DIMM modules. It enables accurate DRAM case temperature estimation and dynamic thermal throttling by replacing ambient motherboard sensors with direct DIMM-mounted measurement - a requirement for DDR3 RDIMM/ECC memory modules.

Does the SE97TL,147 support SMBus TIMEOUT and ALERT features?

Yes, the SE97TL,147 fully supports SMBus TIMEOUT (resetting internal state if SCL is held low 25–35 ms) and SMBus ALERT Response Address (ARA) in interrupt mode. These features prevent system lockups and allow coordinated interrupt handling with other SMBus slaves - critical for reliable operation in server and notebook platforms using Intel Nehalem+ chipsets.

How is EEPROM write protection implemented on the SE97TL,147?

The SE97TL,147 implements two-tier EEPROM write protection: the lower 128 bytes (00h–7Fh) support Permanent Write Protect (PWP) or Reversible Write Protect (RWP) activated via overvoltage on A0 pin (≥7.8 V); the upper 128 bytes (80h–FFh) remain freely writable for general-purpose data storage - preserving vendor SPD data while enabling field updates.

What are the key differences between comparator mode and interrupt mode for the EVENT output on the SE97TL,147?

In comparator mode, the EVENT output latches when temperature crosses upper/lower/critical thresholds and remains asserted until temperature re-enters the safe window or thresholds are reprogrammed. In interrupt mode, EVENT pulses on threshold crossing and must be cleared via CONFIG[5] (CEVNT bit); however, once critical temperature is exceeded, clearing is disabled until temperature drops below Tth(crit). This makes comparator mode ideal for thermostat-style shutdowns, while interrupt mode suits OS-driven throttling.

What package type is used for the SE97TL,147 and why is it suitable for DIMM applications?

The SE97TL,147 uses the HXSON8 package (2 mm × 3 mm × 0.5 mm, JEDEC VCED-3), a thermal-enhanced extremely thin small-outline no-lead package. Its minimal height and footprint allow direct placement on dense DDR3 SO-DIMM/UDIMM PCBs without interfering with adjacent components or socket clearance - essential for space-constrained memory module designs.

SE97TL,147 Specifications

Product attributes: Attribute value

Manufacturer:: NXP Semiconductors

Series:: -

Package/Case:: 8-XFDFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Function:: Temp Monitoring System (Sensor), DIMM DDR Memory

Sensor Type:: Internal

Sensing Temperature:: -40°C ~ 125°C

Accuracy:: ±3°C(Max)

Topology:: ADC (Sigma Delta), Comparator, Register Bank

Output Type:: I2C/SMBus

Output Alarm:: Yes

Output Fan:: Yes

Voltage - Supply:: 3V ~ 3.6V

Operating Temperature:: -40°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 8-HXSON (2x3)

SE97TL,147 FAQ

1.How can I place an order for SE97TL,147 through Aetrix?

Please submit a Request for Quotation (RFQ) for SE97TL,147 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SE97TL,147 reliable?

The price and inventory of SE97TL,147 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SE97TL,147 is usually 5 days.

3.What payment methods are accepted for SE97TL,147?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SE97TL,147 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SE97TL,147?

SE97TL,147 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SE97TL,147 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SE97TL,147?

For technical support, including SE97TL,147 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SE97TL,147 requirements.

6.How does Aetrix verify that SE97TL,147 is sourced from the original manufacturer or authorized distributors?

All SE97TL,147 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SE97TL,147 meets industry standards.

7.What is the process for return or replacement of SE97TL,147?

All SE97TL,147 units undergo pre-shipment inspection (PSI). If there is an issue with SE97TL,147, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SE97TL,147 part is unused and in its original packaging.

Return procedure for SE97TL,147:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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