NXP Semiconductors SE97TP/S900,547
- Part No.:
- SE97TP/S900,547
- Manufacturer:
- NXP Semiconductors
- Category:
- Thermal Management
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
SE97TP/S900,547.pdf
- Description:
- IC TEMP SENSOR DIMM 3.3V 8-HWSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SE97TP/S900,547 from NXP Semiconductors is a JEDEC JC-42.4-compliant DDR memory module temperature sensor with integrated 256-byte SPD EEPROM, operating from −40 °C to +125 °C with ±1 °C max accuracy between +75 °C and +95 °C, 11-bit ΔΣ ADC resolution of 0.125 °C, and I²C/SMBus interface - deployed directly on SO-DIMM/UDIMM/RDIMM modules for DRAM case temperature estimation and thermal throttling control in thin-and-light notebooks.
For engineers reviewing the SE97TP/S900,547 datasheet, SE97TP/S900,547 pinout, SE97TP/S900,547 application, or SE97TP/S900,547 equivalent, key selection criteria include JEDEC Grade B thermal accuracy, HWSON8 (2 × 3 × 0.8 mm) package compatibility with DIMM space constraints, EVENT open-drain interrupt/comparator configurability, EEPROM write-protection architecture for SPD data integrity, and SMBus TIMEOUT/ALERT support for system-level bus robustness.
Technical Context
The SE97TP/S900,547 integrates a local temperature sensor and 256-byte serial EEPROM on a single die, sharing I²C/SMBus (0–400 kHz) with separate slave addresses (0x30–0x37 for temp sensor; 0x50–0x57 for EEPROM normal access; 0x30 for software protection). Its 11-bit ΔΣ ADC performs 8 Hz conversions (125 ms period), latching readings into a 16-bit temperature register updated 10×/second.
Three address pins (A0–A2) enable up to eight devices per bus; A0 is overvoltage-tolerant (10 V) to trigger reversible write protection. The EVENT output supports three modes - comparator (window-based), interrupt (edge-triggered), or critical-only - with programmable hysteresis (0/1.5/3/6 °C) and polarity, and remains asserted during shutdown if active at entry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Temperature Range | −40 °C to +125 °C; full-range operation enables monitoring across DDR3 RDIMM/ECC module thermal profiles. |
| Accuracy (B Grade) | ±1 °C max from +75 °C to +95 °C; meets JEDEC JC-42.4 TSE 2002B3 specification for mobile platform memory modules. |
| Resolution | 0.125 °C (11-bit ΔΣ ADC); provides fine-grained thermal feedback for dynamic refresh rate scaling and throttling decisions. |
| EEPROM Capacity | 256 bytes (128-byte PWP/RWP lower block + 128-byte general-purpose upper block); stores SPD vendor/module data with hardware/software write protection. |
| Supply Voltage | VDD = 3.0–3.6 V (sensor & EEPROM write); EEPROM read functional down to 1.7 V - supports low-power DIMM standby states. |
| I²C/SMBus Speed | 0–400 kHz Fast-mode compatible; SMBus TIMEOUT (25–35 ms) prevents bus lock-up in multi-device systems. |
| Shutdown Current | 5.0 μA max; enables ultra-low-power thermal monitoring during memory idle cycles without compromising SPD accessibility. |
Pinout & Package
SE97TP/S900,547 uses the HWSON8 package (JEDEC PSON8 VCED-3), measuring 2.0 × 3.0 × 0.8 mm, with no leads and 8 terminals - optimized for high-density DIMM mounting where height and footprint are constrained.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | I²C slave address bit 0 | Internally pulled down; overvoltage-tolerant (10 V) to enable reversible software write protection of EEPROM lower block. |
| A1 | I²C slave address bit 1 | Internally pulled down; selects one of eight possible I²C addresses (0x30–0x37) on shared bus with other SE97 devices. |
| A2 | I²C slave address bit 2 | Internally pulled down; completes 3-bit hardware address selection for multi-sensor DIMM configurations. |
| VSS | Ground reference | Common return path for sensor, EEPROM, and interface circuits; requires low-impedance connection to DIMM ground plane. |
| SDA | I²C bidirectional data line | Open-drain I/O requiring external pull-up; carries temperature data, EEPROM contents, and configuration registers via SMBus protocol. |
| SCL | I²C clock input | Open-drain input requiring external pull-up; synchronizes all register reads/writes and EEPROM accesses at up to 400 kHz. |
| EVENT | Thermal alarm output | Open-drain output configurable as active-HIGH/LOW comparator or interrupt; drives motherboard logic or PMIC thermal management inputs. |
| VDD | Power supply | 3.0–3.6 V nominal; powers sensor, EEPROM, and interface; EEPROM read remains functional down to 1.7 V for low-power states. |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC JC-42.4 Compliance | Guarantees ±0.5 °C typ./±1 °C max accuracy in +75 °C to +95 °C range - required for DDR3 RDIMM thermal management certification. |
| Integrated SPD EEPROM | 256-byte serial EEPROM with permanent/reversible software write protection ensures reliable storage of DRAM vendor ID, timing, and capacity data. |
| Configurable EVENT Output | Three operational modes (comparator, interrupt, critical-only) + programmable hysteresis and polarity enable flexible integration with host BIOS or PMIC thermal policies. |
| SMBus Robustness | Built-in TIMEOUT (25–35 ms) and ALERT Response Address (ARA) prevent bus hang-ups and simplify multi-device interrupt arbitration in server DIMM subsystems. |
| Low-Power Operation | 250 μA typical operating current and 5 μA max shutdown current minimize impact on DIMM power budget while maintaining thermal visibility. |
Applications
| DDR3 RDIMM Thermal Monitoring | Laptop SO-DIMM Dynamic Throttling |
|---|---|
Use Scenario: Mounted directly on registered DIMMs in enterprise servers to track DRAM junction temperature under sustained memory bandwidth loads. IC Role / Device Role / Timing Role: Local temperature sensor providing real-time Tcase estimates to chipset for memory traffic throttling - replacing ambient motherboard sensors. Use Value: Enables up to 30% higher sustained memory throughput in thin-and-light notebooks by avoiding worst-case throttling based on ambient or calculated temperatures. |
Use Scenario: Integrated into dual-channel 1 GB SO-DIMM modules in ultrabooks to feed thermal data to Intel Nehalem+ platform controllers. IC Role / Device Role / Timing Role: JEDEC-compliant thermal sensor + SPD EEPROM combo delivering both DRAM identification and precise local temperature for dynamic refresh rate scaling. Use Value: Reduces processor thermal overhead by offloading memory temperature awareness to dedicated hardware, freeing CPU cycles for compute tasks. |
| DDR2/DDR3 UDIMM SPD Replacement | Enterprise Storage Memory Modules |
Use Scenario: Replaces legacy Serial Presence Detect (SPD) EEPROMs on unbuffered DIMMs while adding real-time thermal sensing capability. IC Role / Device Role / Timing Role: Dual-function IC acting as SPD data store (vendor info, timings) and temperature monitor - accessed via same I²C bus with distinct slave addresses. Use Value: Eliminates need for discrete SPD + temp sensor, reducing BOM count and PCB area on cost-sensitive desktop and embedded memory modules. |
Use Scenario: Deployed on high-reliability DDR3 ECC modules used in NAS and SAN controllers where thermal derating impacts data integrity and MTBF. IC Role / Device Role / Timing Role: Critical temperature event generator triggering early warning alerts or graceful shutdown before DRAM exceeds 85 °C maximum operating limit. Use Value: Prevents silent data corruption by enabling proactive thermal mitigation before memory error rates escalate near thermal limits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar temperature-sensing-with-SPD applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SE97TP/S900 | Same HWSON8 package, identical pinout and register map; differs only in manufacturing location (APB Bangkok vs APHK Hong Kong) and topside marking ('S97' vs 'SE97'). | No functional difference; both meet JEDEC JC-42.4 B-grade accuracy and SPD EEPROM specs for DDR3 RDIMM use. | Select SE97TP/S900,547 when sourcing from APB Bangkok wafer fab; verify top-side marking matches board assembly requirements. |
| SE97TL | HXSON8 package (2 × 3 × 0.5 mm); improved VPOR/EVENT IOL; identical electrical specs, register set, and JEDEC compliance. | Thinner profile enables use in next-gen ultra-thin SO-DIMMs where 0.8 mm height is marginal; same DIMM placement and firmware integration. | Choose SE97TL for new designs targeting <0.55 mm total module height; legacy boards using SE97TP/S900,547 require mechanical revalidation. |
Compared with SE97TP/S900,547, SE97TP/S900 offers identical functionality with regional manufacturing variance, while SE97TL delivers identical thermal/EEPROM performance in a thinner package - enabling mechanical optimization without firmware or layout changes beyond footprint clearance verification.
Availability
SE97TP/S900,547 is available at Aetrix Electronics and suitable for DDR3 RDIMM thermal management, laptop SO-DIMM dynamic throttling, and enterprise storage memory modules requiring stable component supply, JEDEC-compliant accuracy, and long-term SPD data integrity.
Supply support for SE97TP/S900,547 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in sensor signal conditioning and embedded interface IP.
The SE97TP/S900,547 belongs to NXP's JEDEC-compliant memory interface sensor family, designed specifically to meet JC-42.4 specifications for DDR2/DDR3 DIMM thermal monitoring and SPD replacement in high-volume computing platforms.
FAQ
What is the primary function of the SE97TP/S900,547 in DDR memory modules?
The SE97TP/S900,547 serves as a JEDEC JC-42.4-compliant temperature sensor and integrated 256-byte SPD EEPROM for DDR2/DDR3 memory modules. It measures local DRAM temperature with ±1 °C max accuracy between +75 °C and +95 °C and stores vendor-specific SPD data - enabling accurate thermal throttling and eliminating the need for separate SPD and temperature ICs on the DIMM.
Does the SE97TP/S900,547 support both I²C and SMBus protocols?
Yes, the SE97TP/S900,547 is fully compatible with both I²C-bus Standard-mode (0–100 kHz) and Fast-mode (0–400 kHz), as well as SMBus (10–100 kHz). It implements SMBus-specific features including TIMEOUT (25–35 ms), ALERT Response Address (ARA), and packet error checking - ensuring robust communication in multi-device server and notebook memory subsystems.
How does the EVENT output of the SE97TP/S900,547 behave in comparator versus interrupt mode?
In comparator mode, the EVENT output asserts when temperature crosses upper/lower boundaries or critical threshold and remains asserted until temperature re-enters the window or thresholds are reprogrammed. In interrupt mode, EVENT pulses on boundary crossing and must be cleared via CONFIG register bit CEVNT; it reasserts only on subsequent crossings - making it suitable for BIOS-driven thermal event logging rather than direct fan control.
What EEPROM protection mechanisms does the SE97TP/S900,547 provide for SPD data integrity?
The SE97TP/S900,547 provides two EEPROM protection layers: Permanent Write Protection (PWP) and Reversible Write Protection (RWP) for the lower 128 bytes (00h–7Fh), safeguarding vendor ID and timing data; the upper 128 bytes (80h–FFh) remain unprotected for general-purpose use. RWP is triggered by driving A0 >7.8 V, allowing field updates without soldering.
Is the SE97TP/S900,547 pin-compatible with other SE97 variants like SE97TL or SE97TK?
Yes, all SE97 variants - including SE97TP/S900,547 (HWSON8), SE97TL (HXSON8), SE97TK (HVSON8), and SE97PW (TSSOP8) - share identical pinout, register map, and electrical interface. Mechanical compatibility depends on package dimensions: SE97TP/S900,547 and SE97TL both use 2 × 3 mm footprints but differ in height (0.8 mm vs 0.5 mm), requiring layout review for clearance.
SE97TP/S900,547 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Temp Monitoring System (Sensor), DIMM DDR Memory
- Sensor Type:
- Internal
- Sensing Temperature:
- -40°C ~ 125°C
- Accuracy:
- ±3°C
- Topology:
- ADC (Sigma Delta), Comparator, Register Bank
- Output Type:
- 2-Wire Serial, I2C/SMBUS
- Output Alarm:
- Yes
- Output Fan:
- Yes
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-HWSON (2x3)
SE97TP/S900,547 FAQ
1.How can I place an order for SE97TP/S900,547 through Aetrix?
Please submit a Request for Quotation (RFQ) for SE97TP/S900,547 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SE97TP/S900,547 reliable?
The price and inventory of SE97TP/S900,547 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SE97TP/S900,547 is usually 5 days.
3.What payment methods are accepted for SE97TP/S900,547?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SE97TP/S900,547 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SE97TP/S900,547?
SE97TP/S900,547 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SE97TP/S900,547 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SE97TP/S900,547?
For technical support, including SE97TP/S900,547 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SE97TP/S900,547 requirements.
6.How does Aetrix verify that SE97TP/S900,547 is sourced from the original manufacturer or authorized distributors?
All SE97TP/S900,547 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SE97TP/S900,547 meets industry standards.
7.What is the process for return or replacement of SE97TP/S900,547?
All SE97TP/S900,547 units undergo pre-shipment inspection (PSI). If there is an issue with SE97TP/S900,547, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SE97TP/S900,547 part is unused and in its original packaging.
Return procedure for SE97TP/S900,547:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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