NXP Semiconductors SE98TK,118

Overview

SE98TK,118 from NXP Semiconductors is a JEDEC JC-42.4-compliant digital temperature sensor IC designed for DDR2/DDR3 SO-DIMM thermal monitoring. It delivers ±1 °C accuracy from +75 °C to +95 °C, operates at 3.0–3.6 V, updates readings 8 times per second (125 ms conversion), and features programmable EVENT output for thermal throttling in thin-and-light notebooks.

For engineers reviewing the SE98TK,118 datasheet, SE98TK,118 pinout, SE98TK,118 application, or SE98TK,118 equivalent, this page provides verified JEDEC-compliant DIMM sensor specifications, HVSON8 package details, I²C/SMBus interface behavior, and real-world thermal event configuration guidance for memory module design.

Technical Context

The SE98TK,118 integrates an 11-bit ΔΣ ADC with on-chip bandgap reference and POR circuitry, enabling autonomous local temperature measurement without external calibration. Its register-mapped architecture supports SMBus TIMEOUT (25–35 ms reset) and Alert Response Address (ARA) arbitration for multi-device bus systems.

It implements three configurable thermal event modes-Comparator, Interrupt, and Critical-only-each governed by independent UPPER/LOWER boundary registers (02h/03h) and Critical Trip register (04h), with hysteresis options of 0 °C, 1.5 °C, 3 °C, or 6 °C selected via CONFIG[10:9]. The EVENT pin operates as open-drain with polarity selectable via CONFIG[1].

Key Specifications

Pinout & Package

HVSON8 package: plastic thermal-enhanced very thin small outline, no leads, 3 × 3 × 0.85 mm body, exposed thermal pad (not electrically connected), moisture sensitivity level 1.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar temperature sensor applications.

Compared with SE98TK,118, SE98PW,118 offers identical functionality in a more serviceable package but sacrifices thermal performance, while LM75BIMM/NOPB omits critical JEDEC features like critical trip latching and programmable hysteresis required for reliable memory thermal control.

Availability

SE98TK,118 is available at Aetrix Electronics and suitable for DDR2/DDR3 memory module manufacturing, laptop thermal management systems, and enterprise server DIMM qualification requiring stable component supply and long-term lifecycle support.

Supply support for SE98TK,118 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and consumer applications, with deep expertise in sensor and interface ICs.

The SE98 product line was engineered specifically to meet JEDEC JC-42.4 requirements for DDR memory module thermal sensing, emphasizing accuracy, SMBus robustness, and integration into space-constrained DIMM footprints.

FAQ

What is the primary application purpose of the SE98TK,118?

The SE98TK,118 is purpose-built as a JEDEC JC-42.4-compliant thermal sensor for DDR2 and DDR3 SO-DIMM modules. Its core function is to accurately monitor DRAM die temperature and feed real-time data to the chipset for dynamic memory throttling-replacing conservative ambient-based throttling with precise, localized thermal control. This capability is validated in thin-and-light notebook platforms where it delivers up to 30 % performance gain.

How does the EVENT output of the SE98TK,118 behave in Comparator mode versus Interrupt mode?

In Comparator mode, the SE98TK,118's EVENT pin asserts when temperature crosses either the UPPER or LOWER boundary (or critical threshold), remaining asserted until temperature re-enters the window or boundaries are reprogrammed. In Interrupt mode, EVENT pulses on each boundary crossing and must be cleared via CONFIG[5]; however, once temperature exceeds the critical threshold, clearing is disabled until temperature falls below T_crit. Both modes support active HIGH/LOW polarity selection via CONFIG[1].

What are the key differences between the SE98TK,118 and SE98PW,118 packages?

The SE98TK,118 uses HVSON8 (3 × 3 × 0.85 mm, leadless), offering lower thermal resistance (θ_JA = 160 °C/W) and superior suitability for ultra-thin DIMMs. The SE98PW,118 uses TSSOP8 (4.4 mm width, gull-wing leads) with higher θ_JA (220 °C/W) but easier manual rework and test probing. Electrically and functionally, both share identical register maps, accuracy specs, and SMBus behavior.

Does the SE98TK,118 support hot-plug operation on live memory slots?

Yes-the SE98TK,118 supports hot-plug operation via built-in protection: open-drain SDA and EVENT pins enter high-impedance during power-up/down, internal 50 ns noise filtering rejects insertion glitches, and I/O structures prevent damaging current backflow when VDD is unpowered but bus lines remain active. These features ensure safe insertion into powered systems without bus contention or latch-up risk.

What is the minimum time required after programming alarm thresholds before the SE98TK,118 begins comparing against them?

The SE98TK,118 requires one full conversion cycle-125 ms-after writing new values to the Upper Boundary Alarm Trip (02h), Lower Boundary Alarm Trip (03h), or Critical Alarm Trip (04h) registers before those thresholds are used in EVENT evaluation. This delay ensures the Temperature register contains valid, post-conversion data before comparison begins, preventing spurious alarms during initialization.