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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5332BC09229-GM3R

Name: SI5332BC09229-GM3R
Brand: Skyworks Solutions Inc.
SKU: SI5332BC09229-GM3R
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5332BC09229-GM3R

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5332BC09229-GM3R.pdf

Description:: IC CLOCK GENERATOR QFN

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Product details

Overview

SI5332BC09229-GM3R from Silicon Labs is a 12-output, factory-programmed, any-frequency clock generator with MultiSynth™ fractional synthesis, delivering 190 fs RMS phase jitter (external crystal), 5–333.33 MHz differential output range, and user-configurable LVDS/LVPECL/HCSL/LVCMOS signal formats per output. It serves as a single-chip clock tree solution in high-speed Ethernet switches and PCIe Gen4-compliant server timing systems.

For engineers reviewing the SI5332BC09229-GM3R datasheet, SI5332BC09229-GM3R pinout, SI5332BC09229-GM3R application, or SI5332BC09229-GM3R equivalent, this page provides verified package mapping (48-pin QFN), confirmed 12-differential-output architecture, validated I²C programmability, and real-world selection guidance against comparable clock generators for mixed-supply, multi-protocol timing designs.

Technical Context

The SI5332BC09229-GM3R implements a two-stage synthesis architecture: a wideband PLL locks to an external 16–50 MHz crystal (XA/XB), then feeds up to three independent MultiSynth fractional dividers and five integer dividers. Its cross-point mux routes any synthesized frequency to any of twelve differential outputs.

Each output bank (A–D) shares a dedicated VDDO supply (1.8/2.5/3.3 V), enabling mixed-voltage operation; all outputs support configurable skew (±245 ps in 35 ps steps), synchronous enable/disable, and spread spectrum (down/center, 0.1–2.5% at 30–33 kHz). The device boots from NVM with pre-programmed configuration SI5332BC09229.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	12 differential clock outputs (Si5332-GM3 variant); supports up to 24 LVCMOS via dual-pin mode.
Phase jitter (RMS)	190 fs (12 kHz–20 MHz integration bandwidth, external crystal reference).
Differential output range	5–333.33 MHz; enables direct generation of PCIe Gen4 (100 MHz), Ethernet 10G (156.25 MHz), and CPRI fronthaul clocks.
Input reference	External crystal (16–50 MHz on XA/XB); no embedded crystal - Si5332B grade confirms external-only oscillator path.
Supply flexibility	VDD core: 1.8/2.5/3.3 V; six independent VDDO banks support mixed 1.8 V, 2.5 V, and 3.3 V differential outputs simultaneously.
Configuration interface	I²C (SCLK/SDATA); factory-programmed with ClockBuilder Pro-generated NVM image SI5332BC09229.
Operating temperature	–40 °C to +85 °C; qualified for industrial and telecom infrastructure environments.

Pinout & Package

SI5332BC09229-GM3R uses a 6×6 mm, 48-pin QFN package (RoHS-6 compliant, GM suffix) with exposed thermal pad. Pin functions are defined per the Si5332 48-QFN pinout (Rev. 1.1, Section 6.1), supporting 12 differential outputs (OUT0–OUT11), six VDDO supply pins (VDDO0–VDDO5), universal hardware inputs (IN1–IN7), and dedicated crystal (XA/XB), clock (CLKIN_2/CLKIN_2#, CLKIN_3/CLKIN_3#), and I²C (SCLK/SDATA) interfaces.

Pin/Terminal	Circuit Role	Design Meaning
OUT0 / OUT0b	Differential clock output pair	Bank A output; independently configurable signal format (LVDS/LVPECL/HCSL) and skew (±245 ps).
VDDO0	Output bank supply	Powers OUT0/OUT0b; set to 1.8/2.5/3.3 V to match receiver voltage domain.
XA / XB	Crystal reference input	Connects to 16–50 MHz fundamental-mode crystal; internal oscillator drives PLL in free-run mode.
SCLK / SDATA	I²C serial interface	Allows in-system reconfiguration; supports standard-mode (100 kHz) and fast-mode (400 kHz) I²C.
IN1–IN7	Universal hardware input	Configurable in ClockBuilder Pro as OE#, spread-spectrum enable, or input select (CLKIN_SEL[1:0]).

Key Features

Feature	Design Value
MultiSynth™ fractional synthesis	Enables zero-ppm error generation of non-integer-related frequencies (e.g., 122.88 MHz + 156.25 MHz + 245.76 MHz) on any output up to 250 MHz.
Cross-point mux architecture	Routes any of three MultiSynth or five integer divider outputs to any differential output bank - critical for flexible clock tree partitioning.
Independent output skew control	Adjustable ±245 ps per differential pair in 35 ps steps - enables precise inter-bank skew alignment for SerDes lane deskew.
Mixed-supply output banks	Six VDDO pins allow concurrent 1.8 V LVDS (FPGA transceivers), 2.5 V LVPECL (ASIC clocks), and 3.3 V HCSL (PCIe slots) on one device.
Spread spectrum modulation	Down-spread or center-spread (0.1–2.5%) reduces EMI peak amplitude without affecting timing margin - validated for FCC/CE compliance.

Applications

100G Ethernet Switch Timing	PCIe Gen4 Server Clocking
Use Scenario: Synchronizing 100G QSFP28 ports, switch fabric ASICs, and management controllers in layer-3 data center switches. IC Role / Device Role / Timing Role: Single-device clock tree generator providing 156.25 MHz (Ethernet), 100 MHz (PCIe), and 25 MHz (management) with sub-200 fs jitter. Use Value: Eliminates 3+ discrete oscillators and fanout buffers; reduces board area by 40% and jitter accumulation across domains.	Use Scenario: Delivering low-jitter reference clocks to CPU, GPU, and NVMe SSD controllers in dual-socket servers. IC Role / Device Role / Timing Role: Generates synchronized 100 MHz PCIe Gen4 REFCLK and 100 MHz SRIS-compliant clocks with <190 fs RMS jitter. Use Value: Meets PCIe Gen4 SRIS spec (±30 ps period jitter) without external jitter cleaners; supports hot-plug and link training stability.
Broadcast Video Synchronization	5G Small Cell Fronthaul
Use Scenario: Aligning SMPTE 2082 (12G-SDI) video streams, genlock signals, and audio sample clocks in IP-based broadcast encoders. IC Role / Device Role / Timing Role: Produces 27 MHz (SDI), 74.25 MHz (HD-SDI), and 148.5 MHz (3G-SDI) from one crystal reference with <200 fs jitter. Use Value: Prevents frame sync loss and lip-sync errors; eliminates need for separate video-specific clock ICs.	Use Scenario: Providing deterministic, low-phase-noise clocks for eCPRI/O-RAN fronthaul radios operating at 245.76 MHz and 30.72 MHz. IC Role / Device Role / Timing Role: Generates IEEE 1588 PTP grandmaster-aligned clocks with <190 fs jitter and programmable output delay. Use Value: Enables sub-100 ns time-error budget for O-RAN split options; supports hitless frequency switching during handover.

100G Ethernet Switch Timing

PCIe Gen4 Server Clocking

Use Scenario: Synchronizing 100G QSFP28 ports, switch fabric ASICs, and management controllers in layer-3 data center switches.

IC Role / Device Role / Timing Role: Single-device clock tree generator providing 156.25 MHz (Ethernet), 100 MHz (PCIe), and 25 MHz (management) with sub-200 fs jitter.

Use Value: Eliminates 3+ discrete oscillators and fanout buffers; reduces board area by 40% and jitter accumulation across domains.

Use Scenario: Delivering low-jitter reference clocks to CPU, GPU, and NVMe SSD controllers in dual-socket servers.

IC Role / Device Role / Timing Role: Generates synchronized 100 MHz PCIe Gen4 REFCLK and 100 MHz SRIS-compliant clocks with <190 fs RMS jitter.

Use Value: Meets PCIe Gen4 SRIS spec (±30 ps period jitter) without external jitter cleaners; supports hot-plug and link training stability.

Broadcast Video Synchronization

5G Small Cell Fronthaul

Use Scenario: Aligning SMPTE 2082 (12G-SDI) video streams, genlock signals, and audio sample clocks in IP-based broadcast encoders.

IC Role / Device Role / Timing Role: Produces 27 MHz (SDI), 74.25 MHz (HD-SDI), and 148.5 MHz (3G-SDI) from one crystal reference with <200 fs jitter.

Use Value: Prevents frame sync loss and lip-sync errors; eliminates need for separate video-specific clock ICs.

Use Scenario: Providing deterministic, low-phase-noise clocks for eCPRI/O-RAN fronthaul radios operating at 245.76 MHz and 30.72 MHz.

IC Role / Device Role / Timing Role: Generates IEEE 1588 PTP grandmaster-aligned clocks with <190 fs jitter and programmable output delay.

Use Value: Enables sub-100 ns time-error budget for O-RAN split options; supports hitless frequency switching during handover.

Equivalent & Alternatives

The following parts are listed as comparable options for similar any-frequency clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332AC10229-GM3R	Si5332A grade; supports full 5–333.33 MHz differential output range and integer+fractional synthesis on all outputs (vs. Si5332B's 5–200 MHz limit on some paths).	Better suited for >200 MHz applications (e.g., 245.76 MHz CPRI, 307.2 MHz eCPRI); identical 48-QFN package and pinout.	Select when output frequencies exceed 200 MHz; otherwise SI5332BC09229-GM3R offers optimal cost/performance for ≤200 MHz use cases.
LMK5B33216RGZR	Texas Instruments device; 16-output, 195 fs RMS jitter, JESD204B/JESD204C compliant, but requires external loop filter and lacks embedded configuration NVM.	Targeted at JESD204B/C ADC/DAC timing; no native PCIe/SRIS support; higher BOM count due to external components.	Choose for RF/data converter timing where JESD204B/C deterministic latency is required; avoid for PCIe/Ethernet where SI5332BC09229-GM3R's integrated compliance and factory programming reduce validation effort.

Compared with Si5332AC10229-GM3R, SI5332BC09229-GM3R trades maximum output frequency headroom (200 vs. 333.33 MHz) for lower cost and optimized power in ≤200 MHz systems; versus LMK5B33216RGZR, it delivers plug-and-play PCIe/Ethernet timing with zero external components and pre-validated SRIS compliance.

Availability

SI5332BC09229-GM3R is available at Aetrix Electronics and suitable for 100G Ethernet switches, PCIe Gen4 servers, broadcast video encoders, and 5G small cell fronthaul systems requiring stable component supply, long-term lifecycle support, and factory-programmed reliability.

Supply support for SI5332BC09229-GM3R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Silicon Labs is a fabless semiconductor company specializing in timing, wireless, and IoT solutions, with over 20 years of leadership in high-performance clock technology and jitter optimization.

The Si5332 family was designed to replace multiple discrete clock sources with a single programmable, multi-output generator for datacenter, telecom, and broadcast infrastructure - emphasizing jitter performance, supply flexibility, and software-driven configuration.

FAQ

What is the crystal frequency requirement for SI5332BC09229-GM3R?

SI5332BC09229-GM3R requires an external fundamental-mode crystal connected to XA/XB pins operating between 16 MHz and 50 MHz. The device does not include an embedded crystal (Si5332B grade confirms external-only reference); typical implementations use 25 MHz or 50 MHz crystals for optimal PLL lock range and jitter performance. SI5332BC09229-GM3R uses this crystal to generate all output frequencies via its MultiSynth™ synthesizer with zero ppm synthesis error.

Does SI5332BC09229-GM3R support PCIe Gen4 SRIS compliance?

Yes, SI5332BC09229-GM3R is explicitly stated as PCIe Gen1/2/3/4 and SRIS compliant in the official Si5332 Data Sheet (Rev. 1.1, Features List). Its 190 fs RMS phase jitter (12 kHz–20 MHz) meets the SRIS period jitter requirement (<±30 ps) for 100 MHz REFCLK. SI5332BC09229-GM3R achieves this with integrated spread spectrum and optimized PLL bandwidth - no external jitter cleaner or additional circuitry is needed.

Can SI5332BC09229-GM3R generate both LVDS and LVPECL outputs simultaneously?

Yes, SI5332BC09229-GM3R supports simultaneous LVDS and LVPECL outputs. Each of its 12 differential outputs is individually configurable for LVDS, LVPECL, HCSL, or LVCMOS via ClockBuilder Pro or I²C registers. Since output banks (A–D) have independent VDDO supplies, LVDS outputs can run at 2.5 V while LVPECL outputs operate at 3.3 V - enabling direct interfacing to mixed-signal FPGA/ASIC platforms without level-shifting.

What is the function of the IN1–IN7 pins on SI5332BC09229-GM3R?

The IN1–IN7 pins on SI5332BC09229-GM3R are universal hardware inputs configured in ClockBuilder Pro to serve roles including output enable (OE#), spread spectrum enable, input clock selection (CLKIN_SEL[1:0]), or I²C address select. They provide deterministic, glitch-free control without host processor intervention. SI5332BC09229-GM3R uses these pins to implement hardware-triggered functions like synchronous output disable or dynamic profile switching - critical for system-level power management and fail-safe timing control.

Is SI5332BC09229-GM3R pin-compatible with other Si5332-GM3 variants?

Yes, SI5332BC09229-GM3R is fully pin-compatible with all Si5332-GM3 devices (48-pin QFN), including Si5332ACxxx-GM3R and Si5332CCxxx-GM3R. The GM3 suffix denotes identical mechanical footprint, thermal pad layout, and pin assignment per the Si5332 48-QFN specification. Differences lie only in NVM configuration (SI5332BC09229) and grade (Si5332B), not physical connectivity - enabling drop-in replacement within the same package variant.

SI5332BC09229-GM3R Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tape & Reel (TR)

Product Status:: Not For New Designs

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5332BC09229-GM3R FAQ

1.How can I place an order for SI5332BC09229-GM3R through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5332BC09229-GM3R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5332BC09229-GM3R reliable?

The price and inventory of SI5332BC09229-GM3R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5332BC09229-GM3R is usually 5 days.

3.What payment methods are accepted for SI5332BC09229-GM3R?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5332BC09229-GM3R transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5332BC09229-GM3R?

SI5332BC09229-GM3R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5332BC09229-GM3R order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5332BC09229-GM3R?

For technical support, including SI5332BC09229-GM3R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5332BC09229-GM3R requirements.

6.How does Aetrix verify that SI5332BC09229-GM3R is sourced from the original manufacturer or authorized distributors?

All SI5332BC09229-GM3R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5332BC09229-GM3R meets industry standards.

7.What is the process for return or replacement of SI5332BC09229-GM3R?

All SI5332BC09229-GM3R units undergo pre-shipment inspection (PSI). If there is an issue with SI5332BC09229-GM3R, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5332BC09229-GM3R part is unused and in its original packaging.

Return procedure for SI5332BC09229-GM3R:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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