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Skyworks Solutions Inc. SI5332BD15678-GM2
- Part No.:
- SI5332BD15678-GM2
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- 40-VFQFN Exposed Pad
- Datasheet:
-
SI5332BD15678-GM2.pdf
- Description:
- LOW JITTER, 8-OUTPUT, ANY-FREQUE
- Quantity:
- Payment:
- Shipping:
Inventory:4,867
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Product details
Overview
SI5332BD15678-GM2 from Skyworks is an 8-output, programmable clock generator based on MultiSynth™ fractional synthesis technology, delivering 190 fs RMS phase jitter with external crystal reference. It supports up to eight differential outputs (LVDS/LVPECL/HCSL/LVCMOS), independent per-output signal format configuration, and operates across –40 to +85 °C. Used in Ethernet switches and PCIe Gen5/6 timing subsystems requiring low-jitter, multi-frequency clock trees.
For engineers reviewing the SI5332BD15678-GM2 datasheet, SI5332BD15678-GM2 pinout, SI5332BD15678-GM2 application, or SI5332BD15678-GM2 equivalent, key selection factors include its 40-pin QFN package, dual MultiSynth fractional synthesis paths, six VDDO supply pins for mixed-voltage output banks, I²C programmability, and factory preprogrammed NVM configuration support.
Technical Context
The SI5332BD15678-GM2 implements a wideband PLL locked to a 16–50 MHz external crystal (XA/XB) or differential input clock, feeding two independent MultiSynth fractional synthesis paths and five integer dividers. Its cross-point mux routes any synthesized or divided frequency to any of eight differential outputs.
Each output bank (A/B) shares a dedicated VDDO supply (1.8/2.5/3.3 V), enabling mixed-signal voltage operation. Hardware input pins are user-configurable via ClockBuilder Pro for functions including OE, spread spectrum enable, or input clock selection - without register-level firmware changes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count | 8 differential clock outputs, configurable as LVDS/LVPECL/HCSL/LVCMOS |
| Jitter (RMS) | 190 fs RMS (measured with external 16–50 MHz crystal reference) |
| Frequency range | Differential outputs: 5–333.33 MHz; LVCMOS: 5–170 MHz |
| Synthesis architecture | Two independent fractional MultiSynth paths + five integer dividers (÷1–63) |
| Input support | External crystal (16–50 MHz), differential clock (10–250 MHz), LVCMOS clock (10–170 MHz) |
| Supply voltages | VDD core: 1.8/2.5/3.3 V; VDDO banks: 1.5/1.8/2.5/3.3 V (LVCMOS), 1.8/2.5/3.3 V (differential) |
| Operating temp | –40 to +85 °C industrial grade |
Pinout & Package
SI5332BD15678-GM2 uses a 40-pin, 6 × 6 mm QFN package (RoHS-6 compliant, exposed thermal pad). Pin assignments follow the Si5332-GM2 40-pin functional block diagram: four outputs with individual VDDO pins (OUT0–OUT3), and four outputs grouped into Bank A (OUT4/OUT4b) and Bank B (OUT5/OUT5b/OUT6/OUT6b/OUT7/OUT7b), sharing VDDO4 and VDDO5 respectively.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| XA/XB | Crystal oscillator input | Connects to external 16–50 MHz fundamental-mode crystal; internal CL tuning available |
| CLKIN_2/CLKIN_2# | Differential reference input | Accepts LVDS/LVPECL/HCSL input (10–250 MHz); AC-coupled |
| OUT0–OUT7, OUT0b–OUT7b | Differential clock outputs | Eight fully configurable differential pairs; each pair supports independent format and VDDO |
| VDDO0–VDDO5 | Output supply rails | Six independent VDDO pins power output banks; enable mixed-supply clock distribution |
| SCLK/SDATA | I²C interface | Standard 400 kHz I²C bus for runtime reconfiguration or NVM programming |
| Input1–Input7 | Universal hardware control | User-defined pins for OE, spread spectrum enable, input select, or I²C address (via ClockBuilder Pro) |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth fractional synthesis | Enables any-frequency generation up to 250 MHz on any output with 0 ppm error |
| Cross-point mux routing | Arbitrarily connects any MultiSynth or integer divider output to any differential output bank |
| Independent output supply banks | Supports simultaneous 1.8 V LVDS and 3.3 V HCSL outputs on same device |
| Embedded configuration storage | NVM stores full clock tree configuration; powers up with factory-programmed settings |
| PCIe Gen5/6 compliance | Meets jitter, slew rate, and spectral mask requirements for PCIe Gen5/6 reference clocks |
Applications
| Ethernet Switch Timing | PCIe Gen5/6 Reference Clocking |
|---|---|
Use Scenario: High-density 10/25/100 GbE switch ASICs requiring multiple synchronized clock domains for SerDes lanes, packet processing, and management interfaces. IC Role / Device Role / Timing Role: Generates eight low-jitter, independently formatted clocks (e.g., 156.25 MHz LVDS for PHY, 100 MHz HCSL for CPU interconnect). Use Value: Replaces three discrete oscillators and a fanout buffer while maintaining <200 fs RMS jitter across all outputs. | Use Scenario: Server motherboard with dual PCIe Gen5 x16 slots, CXL memory expansion, and NVMe storage controllers needing compliant reference clocks. IC Role / Device Role / Timing Role: Provides PCIe REFCLK+/- (100 MHz), CXL REFCLK (100 MHz), and NVMe controller clock (25 MHz) with SRIS-compliant spread spectrum. Use Value: Meets PCIe Gen5/6 SRIS jitter spec (≤1.0 ps RMS, 12 kHz–20 MHz) using single-device solution with factory-tuned NVM configuration. |
| 5G Small Cell Baseband | Industrial Embedded Computing |
Use Scenario: 5G NR small cell radio unit requiring precise synchronization between FPGA baseband processor, ADC/DAC converters, and RF transceivers. IC Role / Device Role / Timing Role: Delivers 30.72 MHz (DAC), 122.88 MHz (ADC), and 15.36 MHz (FPGA logic) from single crystal reference with sub-200 fs jitter. Use Value: Eliminates need for separate VCXOs and jitter cleaners; enables deterministic phase alignment across data converters. | Use Scenario: Ruggedized edge gateway with Intel Atom/Celeron SoC, Gigabit Ethernet PHY, and real-time I/O controllers operating in extended temperature environments. IC Role / Device Role / Timing Role: Supplies 25 MHz (SoC), 125 MHz (PHY), and 10 MHz (RTC) clocks with –40 to +85 °C guaranteed performance and configurable spread spectrum. Use Value: Reduces BOM count by consolidating clocks while meeting industrial EMC requirements via programmable down-spread spectrum (0.1–2.5%). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5332BD15678-GM3 | 48-pin QFN, supports 12 outputs and four VDDO banks vs. GM2's 8 outputs and two banks | Required when >8 outputs or >4 independent supply domains needed | Select GM3 only if additional outputs or finer VDDO segmentation justify larger footprint and cost |
| Si5341-B-GM2 | Higher integration: includes integrated 50 MHz crystal, lower 175 fs RMS jitter, but fixed 8-output pinout | Better for space-constrained designs where embedded crystal eliminates XTAL layout complexity | Choose Si5341-B-GM2 when board area is critical and 50 MHz crystal integration simplifies design validation |
Compared with SI5332BD15678-GM2, the GM3 offers higher output density at the cost of PCB area, while the Si5341-B-GM2 trades external crystal flexibility for lower jitter and smaller layout footprint - both require distinct clock tree planning due to non-identical pinouts and register maps.
Availability
SI5332BD15678-GM2 is available at Aetrix Electronics and suitable for Ethernet switching, PCIe Gen5/6 server platforms, and 5G small cell infrastructure requiring stable component supply, long-term lifecycle assurance, and factory-programmed configuration traceability.
Supply support for SI5332BD15678-GM2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, industrial, and automotive markets.
The Si5332 family delivers high-performance, software-configurable clock generation for systems demanding ultra-low jitter, multi-frequency synthesis, and flexible output formatting - targeting next-generation networking, data center, and wireless infrastructure.
FAQ
What is the maximum differential output frequency supported by SI5332BD15678-GM2?
The SI5332BD15678-GM2 supports differential output frequencies from 5 MHz to 333.33 MHz. This range applies to all supported formats - LVDS, LVPECL, HCSL, and LVCMOS - and is achievable using either the MultiSynth fractional synthesis paths or integer dividers. The upper limit is validated under standard operating conditions (–40 to +85 °C, nominal VDD/VDDO).
Does SI5332BD15678-GM2 include an embedded crystal?
No, SI5332BD15678-GM2 does not include an embedded crystal. It belongs to the Si5332A/B/C/D series, which requires an external 16–50 MHz fundamental-mode crystal connected to XA/XB pins. Embedded crystal variants (e.g., Si5332E/F/G/H/L) use the "E" through "L" suffix and are physically distinct parts with different ordering codes and package markings.
How many independent output supply domains does SI5332BD15678-GM2 support?
The SI5332BD15678-GM2 supports six independent VDDO supply pins (VDDO0–VDDO5), grouped to serve four dedicated outputs (OUT0–OUT3) and two output banks (Bank A: OUT4/OUT4b; Bank B: OUT5/OUT5b/OUT6/OUT6b/OUT7/OUT7b). This allows concurrent operation at different voltage levels - for example, 1.8 V LVDS and 3.3 V HCSL - without level-shifting circuitry.
Can SI5332BD15678-GM2 be configured without ClockBuilder Pro software?
Yes, SI5332BD15678-GM2 can be configured via its I²C interface using custom firmware or host processor code. ClockBuilder Pro is optional and used primarily for GUI-based configuration, NVM programming, and custom part number assignment. All register-level control is documented in the Si5332 Register Map (Rev 206453A), enabling full in-system programmability without proprietary tools.
Is SI5332BD15678-GM2 compliant with PCIe Gen6 reference clock specifications?
Yes, SI5332BD15678-GM2 meets PCIe Gen6 reference clock requirements, including jitter (≤1.0 ps RMS, 12 kHz–20 MHz), slew rate, and spectral mask compliance. Its 190 fs RMS phase jitter (measured with external crystal) provides substantial margin below the Gen6 specification, and spread spectrum functionality supports SRIS mode for enhanced EMI reduction in high-speed link environments.
SI5332BD15678-GM2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 40-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Type:
- Clock Generator
- PLL:
- Yes
- Input:
- Clock, Crystal, LVCMOS
- Output:
- HCSL, LVCMOS, LVDS, LVPECL
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 3:8
- Differential - Input:Output:
- Yes/Yes
- Frequency - Max:
- 200MHz
- Divider/Multiplier:
- Yes/No
- Voltage - Supply:
- 1.71V ~ 3.63V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 40-QFN (6x6)
SI5332BD15678-GM2 FAQ
1.How can I place an order for SI5332BD15678-GM2 through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5332BD15678-GM2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5332BD15678-GM2 reliable?
The price and inventory of SI5332BD15678-GM2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5332BD15678-GM2 is usually 5 days.
3.What payment methods are accepted for SI5332BD15678-GM2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5332BD15678-GM2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5332BD15678-GM2?
SI5332BD15678-GM2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5332BD15678-GM2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5332BD15678-GM2?
For technical support, including SI5332BD15678-GM2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5332BD15678-GM2 requirements.
6.How does Aetrix verify that SI5332BD15678-GM2 is sourced from the original manufacturer or authorized distributors?
All SI5332BD15678-GM2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5332BD15678-GM2 meets industry standards.
7.What is the process for return or replacement of SI5332BD15678-GM2?
All SI5332BD15678-GM2 units undergo pre-shipment inspection (PSI). If there is an issue with SI5332BD15678-GM2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5332BD15678-GM2 part is unused and in its original packaging.
Return procedure for SI5332BD15678-GM2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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