Skyworks Solutions Inc. SI5332BD15716-GM2R
- Part No.:
- SI5332BD15716-GM2R
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- 40-VFQFN Exposed Pad
- Datasheet:
-
SI5332BD15716-GM2R.pdf
- Description:
- LOW JITTER, 8-OUTPUT, ANY-FREQUE
- Quantity:
- Payment:

- Shipping:

Inventory:4,442
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Product details
Overview
SI5332BD15716-GM2R from Skyworks is an 8-output, programmable clock generator using MultiSynth™ fractional synthesis to deliver up to 333.33 MHz differential outputs with 190 fs RMS phase jitter (external crystal), PCIe Gen 1–6 compliance, and independent per-output signal format selection (LVDS/LVPECL/HCSL/LVCMOS). It serves as a single-chip clock tree solution in Ethernet switches and server timing subsystems.
For engineers reviewing the SI5332BD15716-GM2R datasheet, SI5332BD15716-GM2R pinout, SI5332BD15716-GM2R application, or SI5332BD15716-GM2R equivalent, key selection criteria include its 40-pin QFN package, dual fractional synthesis paths, six VDDO supply rails for mixed-voltage output banks, I²C programmability, and factory preprogrammed NVM configuration support via ClockBuilder Pro.
Technical Context
The SI5332BD15716-GM2R implements a wideband PLL locked to either a 16–50 MHz external crystal or differential input clock (10–250 MHz), feeding two independent MultiSynth fractional synthesis paths and five integer dividers. Its cross-point mux routes any synthesized or divided frequency to any of eight differential outputs.
Each output bank (A/B) shares a dedicated VDDO rail (1.5/1.8/2.5/3.3 V), enabling mixed-supply operation; LVCMOS outputs support 1.5 V logic while differential outputs operate at 1.8/2.5/3.3 V. Configuration is stored in on-chip NVM and loaded at power-up, with optional in-system reprogramming via I²C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count | 8 differential clock outputs (Si5332-GM2 variant) |
| Jitter (RMS) | 190 fs (measured over 12 kHz–20 MHz, external crystal reference) |
| Max output frequency | 333.33 MHz (differential); 170 MHz (LVCMOS) |
| Synthesis architecture | Two independent fractional MultiSynth paths + five integer dividers |
| Input support | External crystal (16–50 MHz) or differential clock (10–250 MHz) |
| Signal formats | User-configurable per output: LVDS, LVPECL, HCSL, LVCMOS |
| Operating temperature | –40 °C to +85 °C (industrial grade) |
| Compliance | PCIe Gen 1/2/3/4/5/6 and SRIS compliant |
Pinout & Package
SI5332BD15716-GM2R uses a 40-pin, 6 mm × 6 mm QFN package (RoHS-6 compliant, exposed thermal pad). Pin functions are defined per the Si5332-GM2 block diagram and validated in the official datasheet Section 6.2.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| XA/XB | Crystal oscillator input | Accepts 16–50 MHz fundamental-mode crystal; internal load capacitance configurable (2.5–21.5 pF) |
| CLKIN_2/CLKIN_2# | Differential input clock | Supports LVPECL/LVDS/HCSL; AC-coupled; 10–250 MHz range |
| OUT0/OUT0b – OUT7/OUT7b | Differential clock outputs | Eight pairs; each pair independently configurable for format, swing, and common-mode voltage |
| VDDO0–VDDO5 | Output supply rails | Six independent VDDO pins power four dedicated outputs + two output banks (A/B), enabling mixed-voltage operation |
| SCLK/SDATA | I²C interface | Standard 100/400 kHz I²C bus for configuration read/write and NVM programming |
| OE | Output enable control | Hardware pin (configurable as universal input) to globally enable/disable all clock outputs |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth™ fractional synthesis | Enables any-frequency generation up to 250 MHz on any output with zero ppm error |
| Cross-point multiplexer | Routes any synthesized or integer-divided frequency to any output or bank, enabling flexible clock tree mapping |
| Independent output supply rails | Six VDDO pins allow simultaneous 1.8 V, 2.5 V, and 3.3 V differential outputs and 1.5 V LVCMOS outputs |
| Multi-profile NVM storage | Stores up to 16 complete input/output configurations; enables glitchless on-the-fly frequency switching |
| Embedded spread spectrum | Configurable down-spread or center-spread (0.1–2.5% in 0.01% steps at 30–33 kHz) to reduce EMI |
Applications
| Server Timing Subsystem | Ethernet Switch PHY Clocking |
|---|---|
|
Use Scenario: Generating synchronized clocks for CPU, memory controller, PCIe root complex, and NICs in dual-socket servers. IC Role / Device Role / Timing Role: Single-device clock tree synthesizer replacing multiple discrete oscillators and fanout buffers. Use Value: Eliminates inter-clock skew, reduces BOM count by >60%, and ensures PCIe Gen 5/6 compliance across all lanes. |
Use Scenario: Providing low-jitter reference clocks to 10/25/100 GbE switch ASICs and SerDes PHYs. IC Role / Device Role / Timing Role: Programmable multi-format clock source with per-port voltage and format flexibility. Use Value: Supports mixed-voltage PHYs (1.8 V/2.5 V/3.3 V) and diverse signaling standards (LVDS/HCSL/LVPECL) on one die. |
| Mobile Fronthaul Unit | Broadcast Video Synchronization |
|
Use Scenario: Delivering phase-aligned clocks to CPRI/eCPRI radio units and baseband processing FPGAs. IC Role / Device Role / Timing Role: High-stability, low-phase-noise clock generator with deterministic latency. Use Value: Meets ±50 ppb frequency accuracy and <200 fs jitter requirements for 5G fronthaul timing distribution. |
Use Scenario: Synchronizing SDI transmitters, video processors, and genlock-capable capture cards in broadcast infrastructure. IC Role / Device Role / Timing Role: Precision clock source supporting SMPTE ST 2059-2 PTP grandmaster timing. Use Value: Enables sub-microsecond phase alignment across distributed video equipment using configurable output delays. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5338A-D-GM2 | 4-output, lower integration; no fractional synthesis; max 250 MHz output; 155 fs jitter (embedded crystal) | Targeted at simpler clock trees where fewer outputs and fixed-ratio synthesis suffice | Choose when cost sensitivity outweighs need for 8 outputs, PCIe Gen 6 support, or arbitrary frequency synthesis |
| LMK04832RHAT | 14-output, dual-loop architecture; integrated JESD204B support; 110 fs jitter; requires external loop filter | Optimized for high-speed data converter timing (JESD204B/C), not general-purpose server/switch clocking | Prefer when JESD204B deterministic latency and ultra-low jitter are mandatory, and design can accommodate analog loop filter layout |
Compared with Si5338A-D-GM2 and LMK04832RHAT, the SI5332BD15716-GM2R uniquely balances high output count (8), PCIe Gen 6 readiness, zero-error fractional synthesis, and simplified layout (no external loop filter), making it optimal for dense, multi-protocol timing systems requiring field-programmable flexibility.
Availability
SI5332BD15716-GM2R is available at Aetrix Electronics and suitable for Ethernet switches, server motherboard timing, and 5G fronthaul units requiring stable component supply, long-term lifecycle assurance, and factory-programmed configuration traceability.
Supply support for SI5332BD15716-GM2R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog ICs.
The SI5332BD15716-GM2R belongs to Skyworks' Si5332 family of any-frequency clock generators, designed specifically to consolidate complex clock trees in high-performance computing, networking, and communications infrastructure.
FAQ
What is the package type and pin count of the SI5332BD15716-GM2R?
The SI5332BD15716-GM2R uses a 40-pin, 6 mm × 6 mm QFN package with an exposed thermal pad. This corresponds to the Si5332-GM2 variant, supporting up to eight differential clock outputs and six independent VDDO supply rails. The "GM2" suffix explicitly denotes the 40-pin QFN RoHS-compliant package configuration.
Does the SI5332BD15716-GM2R include an embedded crystal?
No, the SI5332BD15716-GM2R does not include an embedded crystal. It is part of the Si5332B grade (external crystal variant), requiring an external 16–50 MHz fundamental-mode crystal connected to XA/XB pins. Embedded crystal versions use "E/F/G/H/L" suffixes (e.g., SI5332EDxxxxx-GM2R), not "B".
How many independent synthesis paths does the SI5332BD15716-GM2R support?
The SI5332BD15716-GM2R supports two independent fractional MultiSynth synthesis paths plus up to five independent integer dividers. This architecture allows concurrent generation of unrelated frequencies - for example, 156.25 MHz for PCIe and 245.76 MHz for Ethernet - without shared divider constraints.
Can the SI5332BD15716-GM2R generate PCIe Gen 6 reference clocks?
Yes, the SI5332BD15716-GM2R is explicitly PCIe Gen 1/2/3/4/5/6 and SRIS compliant. Its 190 fs RMS phase jitter (12 kHz–20 MHz), sub-ppm frequency accuracy, and support for 100 MHz, 125 MHz, and 250 MHz PCIe reference frequencies meet all electrical and jitter requirements for Gen 6 root complex and endpoint timing.
Is factory programming included with the SI5332BD15716-GM2R?
Yes, SI5332BD15716-GM2R is a ClockBuilder Pro–assigned custom part number and ships factory-programmed with its full configuration stored in non-volatile memory (NVM). No external programming hardware is required - the device powers up with fully functional, application-specific clocks immediately after power-on reset.
SI5332BD15716-GM2R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 40-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Type:
- Clock Generator
- PLL:
- Yes
- Input:
- Clock, Crystal, LVCMOS
- Output:
- HCSL, LVCMOS, LVDS, LVPECL
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 3:8
- Differential - Input:Output:
- Yes/Yes
- Frequency - Max:
- 200MHz
- Divider/Multiplier:
- Yes/No
- Voltage - Supply:
- 1.71V ~ 3.63V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 40-QFN (6x6)
SI5332BD15716-GM2R FAQ
1.How can I place an order for SI5332BD15716-GM2R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5332BD15716-GM2R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5332BD15716-GM2R reliable?
The price and inventory of SI5332BD15716-GM2R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5332BD15716-GM2R is usually 5 days.
3.What payment methods are accepted for SI5332BD15716-GM2R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5332BD15716-GM2R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5332BD15716-GM2R?
SI5332BD15716-GM2R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5332BD15716-GM2R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5332BD15716-GM2R?
For technical support, including SI5332BD15716-GM2R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5332BD15716-GM2R requirements.
6.How does Aetrix verify that SI5332BD15716-GM2R is sourced from the original manufacturer or authorized distributors?
All SI5332BD15716-GM2R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5332BD15716-GM2R meets industry standards.
7.What is the process for return or replacement of SI5332BD15716-GM2R?
All SI5332BD15716-GM2R units undergo pre-shipment inspection (PSI). If there is an issue with SI5332BD15716-GM2R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5332BD15716-GM2R part is unused and in its original packaging.
Return procedure for SI5332BD15716-GM2R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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