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Skyworks Solutions Inc. SI5332CC09722-GM1R
- Part No.:
- SI5332CC09722-GM1R
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- -
- Datasheet:
-
SI5332CC09722-GM1R.pdf
- Description:
- IC CLOCK GENERATOR QFN
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Product details
Overview
SI5332CC09722-GM1R from Silicon Labs is a 6-output, 32-pin QFN programmable clock generator using MultiSynth™ fractional synthesis to deliver any-frequency outputs up to 333.33 MHz with 190 fs RMS phase jitter (external crystal). It supports LVDS/LVPECL/HCSL/LVCMOS per-output signal formats, independent VDDO per output bank, and operates across –40 to +85 °C for Ethernet switch timing and server clock tree consolidation.
For engineers reviewing the SI5332CC09722-GM1R datasheet, SI5332CC09722-GM1R pinout, SI5332CC09722-GM1R application, or SI5332CC09722-GM1R equivalent, key selection considerations include its 6-differential-output configuration, embedded 50 MHz crystal option (Si5332E/F/G/H variant), I²C programmability, and PCIe Gen1–4/SRIS compliance in a compact 5×5 mm QFN package.
Technical Context
The SI5332CC09722-GM1R implements a two-stage synthesis architecture: a wideband PLL locks to either an external 16–50 MHz crystal or an embedded 50 MHz crystal, then feeds up to three independent MultiSynth fractional dividers and five integer dividers. Its cross-point multiplexer routes any synthesized frequency to any of six differential outputs.
Each output features user-configurable format (LVDS/LVPECL/HCSL/LVCMOS), adjustable skew (±245 ps in 35 ps steps), synchronous enable/disable, and independent VDDO supply (1.5/1.8/2.5/3.3 V), enabling mixed-voltage clock distribution in high-density networking and compute platforms.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count | 6 differential clock outputs - supports full fan-out buffering with independent routing via cross-point mux |
| Max output frequency | 333.33 MHz (differential) - enables PCIe Gen4 reference clocks and 100G Ethernet PHY timing |
| Phase jitter (RMS) | 190 fs (external crystal) - meets stringent SRIS and PCIe Gen4 jitter budgets |
| Synthesis resolution | 0 ppm frequency error - eliminates timing margin loss from integer-only dividers |
| Input reference | External crystal: 16–50 MHz - allows flexible low-cost crystal selection without internal oscillator calibration |
| Operating temperature | –40 to +85 °C - qualified for industrial and telecom infrastructure environments |
| Supply voltages | VDD = 1.8/2.5/3.3 V; VDDO = 1.5/1.8/2.5/3.3 V - supports mixed-signal SoC interface voltage domains |
Pinout & Package
SI5332CC09722-GM1R uses a 32-pin QFN package (5×5 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per ClockBuilder Pro configuration; hardware input pins (IN1–IN5) support OE, spread spectrum enable, or input selection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| OUT0 / OUT0b | Differential clock output pair | Configurable as LVDS/LVPECL/HCSL/LVCMOS; driven by MultiSynth0 or INT divider |
| VDDO0 | Output supply for OUT0/OUT0b | Independent 1.5/1.8/2.5/3.3 V rail - enables mixed-voltage signaling on same device |
| IN1–IN5 | Universal hardware input pins | Programmable in ClockBuilder Pro as OE, CLKIN_SEL, SS_EN, or I²C address select |
| XA / XB | Crystal oscillator terminals | Accepts 16–50 MHz fundamental-mode crystal; internal CL configurable (2–30 pF) or disabled |
| SCLK / SDATA | I²C serial interface | Standard 400 kHz I²C bus for in-system reconfiguration without factory programming |
Key Features
| Feature | Design Value |
|---|---|
| Any-frequency synthesis | Generates exact output frequencies (e.g., 156.25 MHz, 250 MHz, 312.5 MHz) with zero ppm error - eliminates need for multiple fixed-frequency oscillators |
| Per-output signal format | LVDS/LVPECL/HCSL/LVCMOS selectable per pin pair - interfaces directly with diverse SerDes, PHY, and FPGA clock inputs |
| Configurable output skew | ±245 ps adjustment in 35 ps steps per differential pair - enables precise inter-lane deskew in multi-channel systems |
| Multi-profile storage | Up to 16 configurations stored in NVM - supports dynamic clock tree reconfiguration for multi-mode operation (e.g., line card vs. control plane) |
| Synchronous output disable | Glitch-free enable/disable synchronized to clock edge - prevents runt pulses during power-state transitions |
Applications
| Server Clock Tree Consolidation | Ethernet Switch Timing |
|---|---|
Use Scenario: Replacing discrete oscillators and fanout buffers in dual-socket x86 servers with DDR5 memory and PCIe Gen4/5 expansion slots. IC Role / Device Role / Timing Role: Primary clock generator synthesizing CPU reference, memory controller clocks, PCIe root complex clocks, and BMC timing from single crystal. Use Value: Reduces BOM count by ≥7 components while maintaining <200 fs RMS jitter across all outputs for PCIe Gen4 compliance. | Use Scenario: Providing synchronized 156.25 MHz, 312.5 MHz, and 625 MHz clocks to 100G/400G Ethernet switch ASICs and PHYs. IC Role / Device Role / Timing Role: Low-jitter clock source feeding multiple SerDes lanes with matched skew and independent voltage domains. Use Value: Enables deterministic latency across 32+ lanes with per-output format and skew tuning - critical for IEEE 802.3bs compliance. |
| Small Cell Baseband Timing | Broadcast Video Synchronization |
Use Scenario: Generating LTE/5G NR baseband sampling clocks (e.g., 30.72 MHz, 61.44 MHz) and fronthaul interface clocks (e.g., CPRI/OBSAI) in compact macro/pico cell radios. IC Role / Device Role / Timing Role: Multi-frequency clock synthesizer supporting both digital front-end sampling and transport layer timing in single-chip solution. Use Value: Eliminates separate TCXOs and jitter cleaners - achieves <1 ps integrated jitter (12 kHz–20 MHz) required for 256-QAM modulation fidelity. | Use Scenario: Delivering SMPTE ST 2059-2 compliant PTP grandmaster clocks (e.g., 27 MHz, 74.25 MHz, 148.5 MHz) and genlock references to broadcast encoders, decoders, and IP media gateways. IC Role / Device Role / Timing Role: Precision clock generator with sub-200 fs jitter and spread spectrum support for EMI reduction in dense rack-mounted video infrastructure. Use Value: Meets ITU-T G.8262 EEC-2 wander tolerance and SMPTE ST 2059-2 accuracy requirements without external jitter cleaning. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5332AC09722-GM1R | Same 6-output 32-QFN package but uses external crystal (Si5332A grade); no embedded crystal | Lacks integrated 50 MHz crystal - requires external XTAL and load caps, increasing layout area and component count | Select when cost sensitivity outweighs board space constraints and external crystal sourcing is preferred |
| Si5341-A01879-GM | 10-output 40-QFN device with lower 135 fs RMS jitter (embedded crystal); higher pin count and larger footprint | Supports more outputs and tighter jitter spec but requires PCB redesign and higher unit cost | Select when >6 outputs or sub-150 fs jitter is mandatory for PCIe Gen5 or coherent optical interfaces |
Compared with SI5332CC09722-GM1R, Si5332AC09722-GM1R trades embedded crystal convenience for lower BOM cost, while Si5341-A01879-GM extends output count and jitter performance at the expense of footprint and complexity - making SI5332CC09722-GM1R optimal for space-constrained 6-output industrial and networking designs requiring plug-and-play timing.
Availability
SI5332CC09722-GM1R is available at Aetrix Electronics and suitable for Ethernet switches, server clock trees, and small cell baseband timing requiring stable component supply, long-term lifecycle support, and RoHS-6 compliance.
Supply support for SI5332CC09722-GM1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Silicon Labs is a fabless semiconductor company specializing in timing, wireless, and IoT solutions, with leadership in low-jitter clock technology and configurable mixed-signal ICs.
The Si5332 family was designed to replace multiple fixed-frequency oscillators and clock buffers with a single programmable clock generator for high-speed data infrastructure - targeting servers, networking gear, and communications equipment where timing flexibility and jitter performance are critical.
FAQ
What is the crystal requirement for SI5332CC09722-GM1R?
The SI5332CC09722-GM1R is a Si5332C-grade device with an embedded 50 MHz crystal (Si5332C variant), eliminating the need for an external crystal or load capacitors. This simplifies PCB layout, reduces component count, and improves startup reliability compared to external-crystal variants like Si5332A. The embedded crystal is factory-calibrated and supports the full –40 to +85 °C operating range.
Does SI5332CC09722-GM1R support PCIe Gen4 compliance?
Yes, SI5332CC09722-GM1R supports PCIe Gen4 compliance with 190 fs RMS phase jitter (12 kHz–20 MHz integration bandwidth) when using its external crystal mode, and 175 fs RMS with embedded crystal - both well below the PCIe Gen4 specification limit of 500 fs RMS. It also meets SRIS (Spread Spectrum Independent Spread) requirements and provides programmable spread spectrum for additional EMI reduction.
How many independent output voltage domains does SI5332CC09722-GM1R support?
SI5332CC09722-GM1R supports six independent VDDO supply pins (VDDO0–VDDO5), one per differential output pair. Each can be set to 1.5 V, 1.8 V, 2.5 V, or 3.3 V, enabling direct interface with mixed-voltage SoCs, FPGAs, and PHYs without level shifters - critical for consolidating clock trees in heterogeneous compute and networking platforms.
Can SI5332CC09722-GM1R generate non-integer related output frequencies?
Yes, SI5332CC09722-GM1R uses Silicon Labs' MultiSynth™ fractional synthesis technology to generate any combination of output frequencies - including non-integer-related ones like 156.25 MHz, 312.5 MHz, and 625 MHz - with zero ppm frequency error. This eliminates timing skew between asynchronous domains and avoids the frequency planning limitations of integer-only clock generators.
Is SI5332CC09722-GM1R pre-programmed or field-programmable?
SI5332CC09722-GM1R is a factory-pre-programmed custom part (indicated by "C09722" NVM code), configured via ClockBuilder Pro for a specific frequency plan and feature set. It boots directly into the programmed configuration from non-volatile memory. However, it remains fully field-programmable via its I²C interface (SCLK/SDATA pins) for in-system updates or reconfiguration without requiring reflashing tools.
SI5332CC09722-GM1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- *
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- -
SI5332CC09722-GM1R FAQ
1.How can I place an order for SI5332CC09722-GM1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5332CC09722-GM1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5332CC09722-GM1R reliable?
The price and inventory of SI5332CC09722-GM1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5332CC09722-GM1R is usually 5 days.
3.What payment methods are accepted for SI5332CC09722-GM1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5332CC09722-GM1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5332CC09722-GM1R?
SI5332CC09722-GM1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5332CC09722-GM1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5332CC09722-GM1R?
For technical support, including SI5332CC09722-GM1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5332CC09722-GM1R requirements.
6.How does Aetrix verify that SI5332CC09722-GM1R is sourced from the original manufacturer or authorized distributors?
All SI5332CC09722-GM1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5332CC09722-GM1R meets industry standards.
7.What is the process for return or replacement of SI5332CC09722-GM1R?
All SI5332CC09722-GM1R units undergo pre-shipment inspection (PSI). If there is an issue with SI5332CC09722-GM1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5332CC09722-GM1R part is unused and in its original packaging.
Return procedure for SI5332CC09722-GM1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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