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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5332DC08535-GM3R

Name: SI5332DC08535-GM3R
Brand: Skyworks Solutions Inc.
SKU: SI5332DC08535-GM3R
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5332DC08535-GM3R

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5332DC08535-GM3R.pdf

Description:: IC CLOCK GENERATOR QFN

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5332DC08535-GM3R from Silicon Labs is a 12-output, factory-programmed, any-frequency clock generator with MultiSynth™ fractional synthesis, delivering 190 fs RMS phase jitter (external crystal), 5–333.33 MHz differential output frequency range, and user-configurable LVDS/LVPECL/HCSL/LVCMOS signal formats per output. It serves as a single-device clock tree solution in high-speed Ethernet switches.

For engineers reviewing the SI5332DC08535-GM3R datasheet, SI5332DC08535-GM3R pinout, SI5332DC08535-GM3R application, or SI5332DC08535-GM3R equivalent, key selection considerations include its 48-pin QFN package, embedded configuration for PCIe Gen4-compliant timing, 12-differential-output capability with independent VDDO banks, and I²C programmability for field tuning.

Technical Context

The SI5332DC08535-GM3R implements a two-stage synthesis architecture: a wideband PLL locks to an external 16–50 MHz crystal (XA/XB), then feeds up to three independent MultiSynth fractional dividers and five integer dividers. Its cross-point mux routes any synthesized or divided clock to any of 12 differential outputs.

Each output bank (A–D) shares a dedicated VDDO supply (1.8/2.5/3.3 V), enabling mixed-voltage system clocking. Output skew is adjustable in 35 ps steps (±122.5 ps), and synchronous output disable prevents runt pulses during enable/disable transitions.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Count	12 differential clock outputs (supports up to 24 LVCMOS via dual-pin mode)
Jitter (RMS)	190 fs - meets PCIe Gen4 SRIS and Ethernet 10G/25G jitter budgets
Frequency Range	5–333.33 MHz differential - covers Ethernet, CPRI, SATA, USB, and DDR reference clocks
Synthesis Accuracy	0 ppm error - eliminates need for trimming or calibration in production
Input Reference	External 16–50 MHz crystal - enables free-run operation without external clock source
Supply Voltages	VDD = 1.8/2.5/3.3 V; VDDOx = 1.5/1.8/2.5/3.3 V - supports mixed-signal SoC interfaces
Interface	I²C (400 kHz fast-mode) - allows runtime reconfiguration and multi-profile switching

Pinout & Package

SI5332DC08535-GM3R is housed in a 6×6 mm, 48-pin QFN package (RoHS-6 compliant) with exposed thermal pad. Pin functions are defined per the Si5332-GM3 48-QFN block diagram and pin descriptions in Sections 6.1 and 7.1 of the datasheet.

Pin/Terminal	Circuit Role	Design Meaning
XA/XB	Crystal Oscillator Input	Connects to external 16–50 MHz fundamental-mode crystal; internal CL configurable (2–30 pF) or disabled
CLKIN_2/CLKIN_2#, CLKIN_3/CLKIN_3#	Differential Clock Inputs	Accept LVPECL/LVDS/HCSL (10–250 MHz); selectable via register or HW pins CLKIN_SEL[1:0]
OUT0–OUT11, OUT0b–OUT11b	Differential Clock Outputs	12 fully independent pairs; each configurable as LVDS/LVPECL/HCSL/LVCMOS with programmable swing and polarity
VDDO0–VDDO5	Output Bank Supplies	6 dedicated VDDO pins power four output banks (A–D) and two individual outputs; enable mixed-voltage clock distribution
SCLK/SDATA	I²C Interface	Standard 2-wire serial interface (400 kHz) for configuration, profile switching, and real-time tuning
Input1–Input7	Universal Hardware Pins	Configurable in ClockBuilder Pro as OE#, spread-spectrum enable, input select, or I²C address

Key Features

Feature	Design Value
MultiSynth™ Fractional Synthesis	Enables exact-frequency generation (e.g., 156.25 MHz, 212.5 MHz) on any output without external VCXOs or PLL loops
Cross-Point Mux Architecture	Routes any of 3 MultiSynth or 5 integer-divided clocks to any output - maximizes flexibility for multi-protocol systems
Multi-Profile Configuration	Stores up to 16 complete clock plans in NVM; enables glitchless on-the-fly switching between profiles (e.g., low-power vs. full-bandwidth modes)
Programmable Spread Spectrum	Down-spread or center-spread (0.1–2.5% at 30–33 kHz) reduces EMI peak emissions without affecting timing integrity
PCIe Gen4 & SRIS Compliance	Validated 190 fs RMS jitter meets PCI-SIG® requirements for root complex and endpoint timing

Applications

Server Clock Tree	Ethernet Switch Timing
Use Scenario: Generating synchronized 100 MHz, 125 MHz, and 156.25 MHz clocks for CPU, memory controller, and PCIe Gen4 lanes in 1U rack servers. IC Role / Device Role / Timing Role: Central clock generator replacing discrete oscillators and fanout buffers; provides deterministic phase relationships across domains. Use Value: Reduces BOM count by 7+ components and eliminates inter-clock skew-induced timing margin loss.	Use Scenario: Delivering low-jitter 250 MHz, 312.5 MHz, and 322.265625 MHz clocks to SerDes PHYs and packet processors in 10G/25G/100G Ethernet switches. IC Role / Device Role / Timing Role: High-stability reference source meeting IEEE 802.3bj/ck jitter masks for PMA and PCS layers. Use Value: Enables single-chip timing for multi-rate line cards without external jitter cleaners or reclockers.
Broadcast Video Sync	Industrial Embedded Computing
Use Scenario: Providing SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz reference clocks to video encoders, decoders, and genlock modules in IP-based broadcast infrastructure. IC Role / Device Role / Timing Role: Precision timing hub with sub-200 fs jitter and programmable output skew for frame-accurate synchronization. Use Value: Eliminates need for separate genlock generators and simplifies compliance testing against SMPTE ST 2059-1.	Use Scenario: Supplying 50 MHz, 100 MHz, and 125 MHz clocks to FPGA fabric, ADC/DAC interfaces, and Gigabit Ethernet MACs in ruggedized edge computing gateways. IC Role / Device Role / Timing Role: Robust, field-reprogrammable clock source operating across –40 to +85 °C with integrated power filtering. Use Value: Ensures timing stability under thermal cycling and EMI-rich industrial environments without external regulators or filters.

Server Clock Tree

Ethernet Switch Timing

Use Scenario: Generating synchronized 100 MHz, 125 MHz, and 156.25 MHz clocks for CPU, memory controller, and PCIe Gen4 lanes in 1U rack servers.

IC Role / Device Role / Timing Role: Central clock generator replacing discrete oscillators and fanout buffers; provides deterministic phase relationships across domains.

Use Value: Reduces BOM count by 7+ components and eliminates inter-clock skew-induced timing margin loss.

Use Scenario: Delivering low-jitter 250 MHz, 312.5 MHz, and 322.265625 MHz clocks to SerDes PHYs and packet processors in 10G/25G/100G Ethernet switches.

IC Role / Device Role / Timing Role: High-stability reference source meeting IEEE 802.3bj/ck jitter masks for PMA and PCS layers.

Use Value: Enables single-chip timing for multi-rate line cards without external jitter cleaners or reclockers.

Broadcast Video Sync

Industrial Embedded Computing

Use Scenario: Providing SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz reference clocks to video encoders, decoders, and genlock modules in IP-based broadcast infrastructure.

IC Role / Device Role / Timing Role: Precision timing hub with sub-200 fs jitter and programmable output skew for frame-accurate synchronization.

Use Value: Eliminates need for separate genlock generators and simplifies compliance testing against SMPTE ST 2059-1.

Use Scenario: Supplying 50 MHz, 100 MHz, and 125 MHz clocks to FPGA fabric, ADC/DAC interfaces, and Gigabit Ethernet MACs in ruggedized edge computing gateways.

IC Role / Device Role / Timing Role: Robust, field-reprogrammable clock source operating across –40 to +85 °C with integrated power filtering.

Use Value: Ensures timing stability under thermal cycling and EMI-rich industrial environments without external regulators or filters.

Equivalent & Alternatives

The following parts are listed as comparable options for similar programmable clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338AC08535-GM	8-output, 40-pin QFN; lower max output count and no embedded crystal option	Suitable for cost-sensitive 8-output designs where 12 outputs are unused	Select when board space or output count permits reduction; retains same MultiSynth engine and jitter performance
LMK04832RHAT	12-output, JESD204B-optimized; higher power, includes dual-loop PLL and jitter cleaner stage	Better suited for RF sampling and high-speed data converter timing where sub-100 fs jitter is required	Choose only if system demands ultra-low jitter cleaning; otherwise SI5332DC08535-GM3R offers superior integration and lower power

Compared with Si5338AC08535-GM, SI5332DC08535-GM3R delivers 50% more outputs in the same footprint class while maintaining identical jitter and configuration workflow; versus LMK04832RHAT, it trades jitter-cleaning headroom for lower power, smaller size, and simplified layout-ideal for dense switch/router line cards.

Availability

SI5332DC08535-GM3R is available at Aetrix Electronics and suitable for Ethernet switches, server clock trees, and broadcast video infrastructure requiring stable component supply, long-term lifecycle support, and factory-programmed consistency.

Supply support for SI5332DC08535-GM3R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Silicon Labs is a fabless semiconductor company specializing in timing, wireless, and IoT solutions, with over 20 years of leadership in precision clock technology.

The Si5332 family was designed to replace multiple fixed-frequency oscillators and clock buffers with a single, software-configurable, any-frequency generator for high-speed communications and computing platforms.

FAQ

What is the factory-programmed configuration of SI5332DC08535-GM3R?

The SI5332DC08535-GM3R is pre-programmed using ClockBuilder Pro with a unique NVM configuration (NVM code 08535) defining its output frequencies, formats, voltage levels, and startup behavior. This eliminates boot-time I²C programming and ensures immediate, deterministic clock output at power-up.

Does SI5332DC08535-GM3R support PCIe Gen4 SRIS compliance?

Yes, SI5332DC08535-GM3R achieves 190 fs RMS phase jitter (measured with external crystal) and meets the PCIe Gen4 SRIS (Spread Spectrum Independent Subsystem) specification for root complex and endpoint timing, as validated in Silicon Labs Application Note AN937.

Can SI5332DC08535-GM3R generate both integer and fractional output frequencies?

Yes, SI5332DC08535-GM3R supports both integer and fractional synthesis modes on all 12 outputs. Its MultiSynth™ engine enables exact non-integer frequencies (e.g., 122.88 MHz, 245.76 MHz) with zero ppm error-critical for JESD204B, CPRI, and audio clocking.

How many independent power domains does SI5332DC08535-GM3R support for its outputs?

SI5332DC08535-GM3R supports six independent VDDO supply pins (VDDO0–VDDO5), powering four output banks (A–D) and two individually configurable outputs. This allows simultaneous 1.8 V, 2.5 V, and 3.3 V differential signaling on different outputs for mixed-voltage SoC interfacing.

Is SI5332DC08535-GM3R pin-compatible with other Si5332 variants like GM1 or GM2?

No, SI5332DC08535-GM3R uses the 48-pin QFN package and is not pin-compatible with the 32-pin (GM1) or 40-pin (GM2) variants. Pin count, VDDO allocation, and output bank structure differ significantly-PCB layout must be specific to the GM3 footprint.

SI5332DC08535-GM3R Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tape & Reel (TR)

Product Status:: Not For New Designs

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5332DC08535-GM3R FAQ

1.How can I place an order for SI5332DC08535-GM3R through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5332DC08535-GM3R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5332DC08535-GM3R reliable?

The price and inventory of SI5332DC08535-GM3R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5332DC08535-GM3R is usually 5 days.

3.What payment methods are accepted for SI5332DC08535-GM3R?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5332DC08535-GM3R transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5332DC08535-GM3R?

SI5332DC08535-GM3R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5332DC08535-GM3R order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5332DC08535-GM3R?

For technical support, including SI5332DC08535-GM3R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5332DC08535-GM3R requirements.

6.How does Aetrix verify that SI5332DC08535-GM3R is sourced from the original manufacturer or authorized distributors?

All SI5332DC08535-GM3R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5332DC08535-GM3R meets industry standards.

7.What is the process for return or replacement of SI5332DC08535-GM3R?

All SI5332DC08535-GM3R units undergo pre-shipment inspection (PSI). If there is an issue with SI5332DC08535-GM3R, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5332DC08535-GM3R part is unused and in its original packaging.

Return procedure for SI5332DC08535-GM3R:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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