Skyworks Solutions Inc. SI5332G-D-GM2

Overview

SI5332G-D-GM2 from Skyworks Solutions is an 8-output, programmable any-frequency clock generator with embedded 50 MHz crystal, supporting differential outputs up to 333.33 MHz and 190 fs RMS phase jitter (external reference mode). It features two independent fractional synthesis paths, five integer dividers, and user-configurable LVDS/LVPECL/HCSL/LVCMOS output formats per channel. The device serves as a high-density clock tree synthesizer in multi-protocol networking systems requiring PCIe Gen1–6 compliance and mixed-supply voltage support.

For engineers reviewing the SI5332G-D-GM2 datasheet, SI5332G-D-GM2 pinout, SI5332G-D-GM2 application, or SI5332G-D-GM2 equivalent, key selection considerations include its 40-pin LGA package, factory-programmable NVM configuration via ClockBuilder Pro, dual-mode input selection (embedded crystal or external clock), banked VDDO supply architecture, and support for hitless frequency switching across 16 stored profiles.

Technical Context

The SI5332G-D-GM2 implements a wideband PLL paired with Skyworks' MultiSynth™ fractional-N synthesis engine to deliver precise, low-jitter clock generation across eight differential outputs. Its architecture includes a cross-point multiplexer enabling any synthesized frequency path to route to any output bank, plus independent integer dividers (÷1–63) per output for fine-grained frequency tailoring.

This variant belongs to the Si5332G grade-supporting integer and fractional synthesis modes, 5–333.33 MHz differential output range, and embedded 50 MHz crystal reference. It operates over –40 to +85 °C, uses 1.8/2.5/3.3 V core VDD, and provides six dedicated VDDO pins for mixed-voltage output banks (1.5/1.8/2.5/3.3 V).

Key Specifications

Pinout & Package

SI5332G-D-GM2 is housed in a 6×6 mm, 40-pin LGA (Land Grid Array) package with exposed thermal pad. Pin assignments follow the Si5332-GM2 functional block diagram: four individually powered outputs (OUT0–OUT3 with dedicated VDDO0–VDDO3), and two shared-bank outputs (OUT4–OUT7 grouped into Bank A and Bank B, each with one common VDDO pin).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar programmable clock generator applications.

Compared with SI5332D-D-GM2, SI5332G-D-GM2 removes crystal layout dependency and improves time-to-market for compact designs; versus Si5341-based solutions, it offers lower cost and sufficient performance for Gen5 PCIe and 100G Ethernet, without over-specifying for Gen6+ requirements.

Availability

SI5332G-D-GM2 is available at Aetrix Electronics and suitable for server motherboard design, telecom switch timing, and broadcast video equipment requiring stable component supply, long-term lifecycle assurance, and factory-programmed configuration support.

Supply support for SI5332G-D-GM2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog products.

The Si5332 family was designed to consolidate clock trees in high-speed digital systems-replacing multiple fixed-frequency oscillators and fanout buffers with a single, software-configurable, low-jitter clock generator for datacenter, networking, and communications infrastructure.

FAQ

What is the default configuration behavior of SI5332G-D-GM2 at power-up?

SI5332G-D-GM2 loads its factory-programmed configuration from non-volatile memory (NVM) upon power-up, enabling immediate clock output without host processor intervention. This default profile includes preconfigured output frequencies, formats, and VDDO voltages assigned during ClockBuilder Pro customization. If no NVM image is programmed, outputs remain disabled until I²C initialization occurs.

Does SI5332G-D-GM2 support PCIe Gen6 reference clock requirements?

Yes, SI5332G-D-GM2 meets PCIe Gen6 reference clock specifications: it delivers 100 MHz ±300 ppm frequency accuracy, <1.5 ps RMS jitter (12 kHz–20 MHz), and supports spread spectrum modulation. Its 190 fs RMS jitter (external reference mode) and 175 fs RMS (embedded crystal mode) provide headroom beyond PCIe Gen6's 2.0 ps limit, ensuring robust link training and stability.

Can SI5332G-D-GM2 generate both LVDS and LVPECL outputs simultaneously?

Yes, SI5332G-D-GM2 supports per-output signal format selection. Each of its eight differential outputs (OUT0–OUT7) can be independently configured as LVDS, LVPECL, HCSL, or LVCMOS via ClockBuilder Pro or I²C register writes. This allows concurrent LVDS clocks for FPGAs and LVPECL clocks for ASICs on the same device, with appropriate VDDO voltage assignment per bank.

How many unique clock profiles can be stored in SI5332G-D-GM2's NVM?

SI5332G-D-GM2 supports storage of up to 16 distinct clock configurations in its on-chip non-volatile memory. These profiles include full settings for input selection, output frequencies, formats, drive strengths, and spread spectrum parameters. Profiles can be selected dynamically via hardware pins or I²C, enabling rapid reconfiguration for multi-mode operation without firmware overhead.

Is external termination required for SI5332G-D-GM2's HCSL outputs?

No, SI5332G-D-GM2 integrates internal 85 Ω or 100 Ω termination resistors for HCSL outputs-configurable via ClockBuilder Pro. This eliminates need for external resistors on the board, simplifying layout and reducing component count. External AC coupling capacitors (0.1 µF) are still required per HCSL standard, but no pull-down or termination resistors are needed at the driver side.