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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5334C-B04687-GM

Name: SI5334C-B04687-GM
Brand: Skyworks Solutions Inc.
SKU: SI5334C-B04687-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5334C-B04687-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5334C-B04687-GM.pdf

Description:: 4-OUTPUT, ANY FREQUENCY(<200MHZ)

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5334C-B04687-GM from Skyworks Solutions is a pin-controlled, quad-output any-frequency clock generator with four independently configurable differential clock outputs, 0.7 ps RMS typical phase jitter, 0 ppm frequency accuracy, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL signal formats - deployed in Ethernet switch/router, PCIe 3.0, and FPGA clocking systems.

For engineers reviewing the SI5334C-B04687-GM datasheet, SI5334C-B04687-GM pinout, SI5334C-B04687-GM application, or SI5334C-B04687-GM equivalent, key selection considerations include its 4×4 mm 24-QFN package, factory-programmed configuration, 1.8/2.5/3.3 V core supply flexibility, independent output voltage per driver (1.5–3.3 V), and MultiSynth-based zero-ppm synthesis up to 710 MHz on select outputs.

Technical Context

The SI5334C-B04687-GM integrates a fractional-N PLL with on-chip VCO and four independent MultiSynth synthesis stages, each feeding one of four differential output drivers. Input reference options include 8–30 MHz crystal or 5–710 MHz differential/single-ended clock signals.

Each output supports independent format selection (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), independent VDDO supply (1.5/1.8/2.5/3.3 V), and programmable phase offset (±45 ns in 20 ps steps). The device operates across –40 to +85 °C and uses OTP NVM for factory configuration without runtime I²C control.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Count	Four differential clock outputs (CLK0A/B through CLK3A/B), configurable as eight single-ended clocks or mixed mode.
Max Output Frequency	350 MHz on all outputs; up to 710 MHz on select outputs using Fvco/4 or Fvco/6 dividers.
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), meeting PCIe 3.0 and GbE timing requirements.
Frequency Accuracy	True 0 ppm error across all outputs due to fractional-N MultiSynth synthesis with no rounding error.
Input Reference Range	Crystal: 8–30 MHz; CMOS: 5–200 MHz; SSTL/HSTL: 5–350 MHz; differential: 5–710 MHz.
Supply Voltages	Core: 1.8/2.5/3.3 V; output buffers: independently selectable 1.5/1.8/2.5/3.3 V per driver.
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad.

Pinout & Package

SI5334C-B04687-GM is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5334 family pinout and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
IN1 / IN2	Differential reference input (P/N)	Accepts 5–710 MHz AC-coupled differential clock; internal 100 Ω termination enabled.
IN3 / IN4	Single-ended reference input (CMOS/SSTL/HSTL)	DC-coupled; supports 5–350 MHz; VIH = 0.7×VDD, VIL = 0.3×VDD.
CLK0A / CLK0B	Differential output 0 (P/N)	Programmable format (LVPECL/LVDS/HCSL/etc.); independent VDDO0 supply.
CLK1A / CLK1B	Differential output 1 (P/N)	Independent frequency, phase, format, and VDDO1 supply; supports phase increment/decrement.
CLK2A / CLK2B	Differential output 2 (P/N)	Same configurability as CLK0/CLK1; supports spread spectrum when configured at 100 MHz.
CLK3A / CLK3B	Differential output 3 (P/N)	Full independence: format, voltage, frequency, and phase; loss-of-signal alarm monitoring available.
OEB	Output enable (active low)	Asynchronous global disable of all output drivers; high-Z state when asserted.
LOSLOL	Loss-of-signal/loss-of-lock alarm output	Open-drain active-low flag indicating input failure or PLL unlock; 3 mA sink capability.
VDD / VDDO0–VDDO3	Power supplies	VDD: core logic (1.8/2.5/3.3 V); VDDOx: per-output buffer supply (1.5–3.3 V).
GND / RSVD_GND	Ground connections	Multiple dedicated GND pins including exposed thermal pad; required for jitter and thermal performance.

Key Features

Feature	Design Value
MultiSynth frequency synthesis	Enables independent, zero-ppm any-frequency generation on all four outputs up to 350 MHz (710 MHz on select paths).
Per-output voltage control	Each output driver powered by independent VDDO supply (1.5/1.8/2.5/3.3 V), enabling mixed-voltage system interfacing.
Pin-controlled phase adjustment	±45 ns phase offset per output in 20 ps steps, updated at up to 1.5 MHz - no I²C or firmware required.
Spread spectrum (SSC)	PCIe 2.0-compliant SSC available on any 100 MHz output with Rn divider = 1, reducing EMI peak emissions.
Zero-delay feedback mode	Optional external feedback path (FDBK/FDBKB) enables true zero-phase-difference operation between reference and output.
Loss-of-signal detection	Sub-5 µs assertion of LOSLOL pin on input failure, supporting fail-safe system monitoring and recovery.

Applications

Ethernet Switch/Router Timing	PCI Express 3.0 Clocking
Use Scenario: Synchronizing multi-lane 10 GbE PHYs, packet processors, and switch fabric ASICs requiring sub-1 ps jitter. IC Role / Device Role / Timing Role: Primary clock source generating independent 156.25 MHz, 125 MHz, and 100 MHz clocks with matched phase alignment. Use Value: 0.7 ps RMS jitter ensures compliance with IEEE 802.3bj CAUI-4 and OIF CEI-28G-VSR specifications.	Use Scenario: Providing reference clocks to CPU, GPU, and peripheral controllers in server/mainboard designs with PCIe 3.0 x16 slots. IC Role / Device Role / Timing Role: Generating 100 MHz differential HCSL clocks with PCIe 3.0-compliant RMS jitter ≤ 0.45 ps. Use Value: Factory-programmed configuration eliminates boot-time I²C initialization, reducing BIOS complexity and boot latency.
FPGA and SoC Clock Distribution	Broadcast Video Timing
Use Scenario: Driving multiple clock domains in Xilinx Versal or Intel Agilex FPGAs - including transceiver refclks, fabric clocks, and DDR memory interfaces. IC Role / Device Role / Timing Role: Delivering four independent frequencies (e.g., 333.33 MHz GTY refclk, 200 MHz fabric, 133.33 MHz DDR, 25 MHz config) from single device. Use Value: Independent VDDO supplies allow direct interface to 1.2 V GTY banks, 0.85 V fabric, and 1.5 V DDR I/O without level shifters.	Use Scenario: Genlock-capable timing for SMPTE ST 2082 (12G-SDI) routers and IP video encoders requiring ultra-low jitter and frame-accurate synchronization. IC Role / Device Role / Timing Role: Synthesizing 27 MHz, 74.25 MHz, and 148.5 MHz video clocks with <10 ps cycle-cycle jitter for clean eye diagrams. Use Value: Phase adjustment feature enables precise skew compensation across multi-channel video processing pipelines.

Ethernet Switch/Router Timing

PCI Express 3.0 Clocking

Use Scenario: Synchronizing multi-lane 10 GbE PHYs, packet processors, and switch fabric ASICs requiring sub-1 ps jitter.

IC Role / Device Role / Timing Role: Primary clock source generating independent 156.25 MHz, 125 MHz, and 100 MHz clocks with matched phase alignment.

Use Value: 0.7 ps RMS jitter ensures compliance with IEEE 802.3bj CAUI-4 and OIF CEI-28G-VSR specifications.

Use Scenario: Providing reference clocks to CPU, GPU, and peripheral controllers in server/mainboard designs with PCIe 3.0 x16 slots.

IC Role / Device Role / Timing Role: Generating 100 MHz differential HCSL clocks with PCIe 3.0-compliant RMS jitter ≤ 0.45 ps.

Use Value: Factory-programmed configuration eliminates boot-time I²C initialization, reducing BIOS complexity and boot latency.

FPGA and SoC Clock Distribution

Broadcast Video Timing

Use Scenario: Driving multiple clock domains in Xilinx Versal or Intel Agilex FPGAs - including transceiver refclks, fabric clocks, and DDR memory interfaces.

IC Role / Device Role / Timing Role: Delivering four independent frequencies (e.g., 333.33 MHz GTY refclk, 200 MHz fabric, 133.33 MHz DDR, 25 MHz config) from single device.

Use Value: Independent VDDO supplies allow direct interface to 1.2 V GTY banks, 0.85 V fabric, and 1.5 V DDR I/O without level shifters.

Use Scenario: Genlock-capable timing for SMPTE ST 2082 (12G-SDI) routers and IP video encoders requiring ultra-low jitter and frame-accurate synchronization.

IC Role / Device Role / Timing Role: Synthesizing 27 MHz, 74.25 MHz, and 148.5 MHz video clocks with <10 ps cycle-cycle jitter for clean eye diagrams.

Use Value: Phase adjustment feature enables precise skew compensation across multi-channel video processing pipelines.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06983-GM	Higher integration: 8 outputs, integrated EEPROM, I²C programmability; 0.5 ps RMS jitter; 4×4 mm 32-QFN package.	Requires firmware initialization; suited for dynamic reconfiguration scenarios (e.g., software-defined radio).	Choose for field-upgradable configurations or >4 output needs; not pin-compatible with SI5334C-B04687-GM.
ICS8430I-01T	Fixed-frequency quad LVDS generator (100/125/156.25 MHz); no frequency synthesis; 1.2 ps RMS jitter; 32-QFN.	Limited to pre-defined frequencies; no phase/frequency tuning; lower cost for static clock trees.	Choose only if exact standard frequencies suffice and synthesis flexibility is unnecessary.

Compared with SI5334C-B04687-GM, the Si5332A-D06983-GM adds programmability at the cost of boot dependency, while the ICS8430I-01T sacrifices synthesis capability for deterministic low-cost delivery - making SI5334C-B04687-GM optimal for fixed-function, high-jitter-margin systems needing guaranteed zero-ppm accuracy without runtime control.

Availability

SI5334C-B04687-GM is available at Aetrix Electronics and suitable for Ethernet switch/router timing, PCIe 3.0 clocking, and FPGA/SoC clock distribution requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5334C-B04687-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for infrastructure, automotive, and industrial markets.

The Si5334 product line delivers pin-configurable, low-jitter clock generators targeting high-speed serial interface timing in networking, computing, and broadcast equipment where zero-ppm synthesis and minimal layout overhead are critical.

FAQ

What is the maximum output frequency supported by SI5334C-B04687-GM?

The SI5334C-B04687-GM supports up to 350 MHz on all four outputs using standard MultiSynth division. For select outputs, frequencies up to 710 MHz are achievable via Fvco/4 or Fvco/6 paths - confirmed in Table 4 of the datasheet and functional block diagram. Operation above 350 MHz requires specific divider configurations and is limited to two unique frequencies simultaneously.

Does SI5334C-B04687-GM require I²C programming during system operation?

No. SI5334C-B04687-GM uses factory-programmed OTP NVM and operates autonomously after power-up. All configuration - including frequencies, formats, voltages, and phase offsets - is stored permanently. Pin control (e.g., OEB, PINC/FINC) enables runtime adjustments without I²C, simplifying design and eliminating boot dependencies.

Can SI5334C-B04687-GM generate different output formats simultaneously?

Yes. Each of the four differential outputs (CLK0A/B through CLK3A/B) can be independently configured for LVPECL, LVDS, HCSL, CMOS, SSTL, or HSTL. This allows simultaneous delivery of, for example, LVDS to an FPGA, HCSL to a PCIe slot, and CMOS to a microcontroller - all from a single SI5334C-B04687-GM device.

What is the phase adjustment resolution and range for SI5334C-B04687-GM?

The SI5334C-B04687-GM supports phase offset adjustment on each output with <20 ps step resolution over a ±45 ns range. This capability is implemented via dedicated pin control (PINC/PDEC) and applies across the 0.16–350 MHz frequency band, enabling precise inter-output skew calibration without software intervention.

Is spread spectrum clocking (SSC) supported on SI5334C-B04687-GM?

Yes - but only on outputs configured at exactly 100 MHz with Rn divider set to 1. The SI5334C-B04687-GM implements PCIe 2.0-compliant SSC with ±0.5% deviation at 30–33 kHz modulation rate. This feature reduces EMI peaks without affecting timing margin, and is enabled per-output via factory programming.

SI5334C-B04687-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5334C-B04687-GM FAQ

1.How can I place an order for SI5334C-B04687-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5334C-B04687-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5334C-B04687-GM reliable?

The price and inventory of SI5334C-B04687-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5334C-B04687-GM is usually 5 days.

3.What payment methods are accepted for SI5334C-B04687-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5334C-B04687-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5334C-B04687-GM?

SI5334C-B04687-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5334C-B04687-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5334C-B04687-GM?

For technical support, including SI5334C-B04687-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5334C-B04687-GM requirements.

6.How does Aetrix verify that SI5334C-B04687-GM is sourced from the original manufacturer or authorized distributors?

All SI5334C-B04687-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5334C-B04687-GM meets industry standards.

7.What is the process for return or replacement of SI5334C-B04687-GM?

All SI5334C-B04687-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5334C-B04687-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5334C-B04687-GM part is unused and in its original packaging.

Return procedure for SI5334C-B04687-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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