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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5334C-B04801-GMR

Name: SI5334C-B04801-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5334C-B04801-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5334C-B04801-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5334C-B04801-GMR.pdf

Description:: 4-OUTPUT, ANY FREQUENCY(<200MHZ)

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5334C-B04801-GMR from Skyworks Solutions is a pin-controlled, quad-output any-frequency clock generator with four independently configurable differential clock outputs, 0.7 ps RMS typical phase jitter, 0 ppm frequency accuracy, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL signal formats - deployed in Ethernet switch timing, PCIe 3.0 clocking, and FPGA reference clock distribution.

For engineers reviewing the SI5334C-B04801-GMR datasheet, SI5334C-B04801-GMR pinout, SI5334C-B04801-GMR application, or SI5334C-B04801-GMR equivalent, this page delivers verified technical context, factory-programmed configuration details, output format flexibility per channel, phase/frequency adjustment capability, and real-world jitter performance metrics under defined test conditions.

Technical Context

The SI5334C-B04801-GMR integrates a fractional-N PLL with on-chip VCO and four independent MultiSynth synthesis stages, each supporting non-integer frequency division to generate any output frequency up to 350 MHz (and select frequencies to 710 MHz) with zero ppm error. Input flexibility includes 8–30 MHz crystal or 5–710 MHz differential/single-ended clock references.

Each of the four differential output pairs (CLK0A/B through CLK3A/B) features independent voltage supply (1.5/1.8/2.5/3.3 V), programmable initial phase offset (±45 ns), 20 ps phase step resolution, and glitchless 1 ppm frequency increment/decrement on CLK0A/B - all implemented via dedicated control pins without I²C interface.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Count	Four differential clock outputs (CLK0A/B, CLK1A/B, CLK2A/B, CLK3A/B), configurable as eight single-ended clocks or mixed mode.
Frequency Range	0.16–350 MHz (all formats); up to 710 MHz for LVPECL/LVDS with specific constraints per MultiSynth stage.
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), measured at 125 MHz outputs with 25 MHz crystal input per JEDEC 65.
Core Supply Voltage	1.8 V, 2.5 V, or 3.3 V - supports mixed-voltage system integration with independent output buffer supplies.
Package	24-pin QFN, 4 mm × 4 mm, 0.5 mm pitch - optimized for high-density PCB layouts with thermal pad.
Operating Temp	–40 °C to +85 °C ambient - qualified for industrial and telecom line card environments.
Input Reference	Crystal (8–30 MHz) or AC/DC-coupled clock (5–710 MHz differential; 5–350 MHz single-ended).

Pinout & Package

SI5334C-B04801-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per Skyworks Rev. 1.3 datasheet Figure 2 (Transparent Top View).

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential Output Pair 0	Factory-configured clock output; supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL with independent VDDO0 supply.
CLK1A / CLK1B	Differential Output Pair 1	Independent output with separate voltage rail (VDDO1); enables mixed-signal voltage domain interfacing.
CLK2A / CLK2B	Differential Output Pair 2	Configurable for PCIe 3.0-compliant 100 MHz spread spectrum or low-jitter synchronous clocking.
CLK3A / CLK3B	Differential Output Pair 3	Supports phase-adjustable output (±45 ns range, 20 ps steps) for skew compensation in multi-FPGA systems.
IN1 / IN2, IN5 / IN6	Differential Clock Inputs	Accept 5–710 MHz AC-coupled reference; internal 10 kΩ termination enables direct connection to LVDS/HCSL sources.
IN3 / IN4	Single-Ended Clock Inputs	Support CMOS/SSTL/HSTL inputs (5–350 MHz); VIH/VIL thresholds scale with VDD for robust logic-level compatibility.
VDD, VDDO0–VDDO3	Power Supplies	Separate core (VDD) and per-output buffer (VDDOx) rails allow independent voltage selection per clock domain.
LOSLOL	Loss-of-Signal/Loss-of-Lock Alarm	Open-drain output asserting within 5 µs of input failure or PLL unlock - used for system fault monitoring.
OEB	Output Enable Bar	Active-low global enable controlling all four output drivers; supports power-aware clock gating during idle states.

Key Features

Feature	Design Value
MultiSynth Frequency Synthesis	Four independent synthesis engines enabling simultaneous, non-integer frequency generation on all outputs with zero ppm error.
Per-Output Signal Format Selection	Each output pair supports LVPECL, LVDS, HCSL, CMOS, SSTL, or HSTL - eliminating need for external level translators.
Programmable Phase Offset	±45 ns initial phase shift per output with 20 ps resolution - enables precise inter-clock alignment in multi-ASIC timing paths.
Glitchless Frequency Adjustment	1 ppm step size on CLK0A/B with 1.5 MHz update rate - supports margin testing and dynamic frequency tuning without output interruption.
PCIe 2.0/3.0 Spread Spectrum	SSC compliant on any 100 MHz output with ±0.5% deviation at 30–33 kHz - reduces EMI in high-speed serial link applications.

Applications

Ethernet Switch Timing	PCI Express 3.0 Clocking
Use Scenario: Synchronizing packet forwarding engines, MAC controllers, and SerDes PHYs across multi-port 10 GbE/25 GbE switches. IC Role / Device Role / Timing Role: Primary clock source generating 125 MHz, 156.25 MHz, and 312.5 MHz reference clocks with sub-ps jitter for deterministic latency. Use Value: Meets IEEE 802.3bj jitter compliance for 10GBASE-KR and 25GBASE-KR backplane interfaces.	Use Scenario: Providing common-clock architecture for CPU, GPU, and NVMe SSD controllers in server motherboards. IC Role / Device Role / Timing Role: Quad-output generator delivering 100 MHz PCIe Gen3 reference clocks with SSC enabled on two outputs. Use Value: Achieves <0.45 ps RMS jitter (10 kHz–50 MHz) required by PCI-SIG specification for Gen3 common clock mode.
FPGA Reference Clocking	Broadcast Video Timing
Use Scenario: Driving multiple high-end FPGAs (e.g., Xilinx Versal, Intel Stratix 10) requiring distinct clock domains for transceivers, fabric, and memory interfaces. IC Role / Device Role / Timing Role: Configurable clock generator supplying 148.5 MHz, 297 MHz, and 74.25 MHz video clocks plus 100 MHz system clock. Use Value: Independent VDDOx rails allow 1.8 V LVDS for transceivers and 3.3 V CMOS for configuration logic on same device.	Use Scenario: Generating SMPTE ST 2082 (12G-SDI) and ST 2081 (6G-SDI) reference clocks in broadcast cameras and routing switchers. IC Role / Device Role / Timing Role: Low-jitter source for 74.25 MHz, 148.5 MHz, and 297 MHz pixel clocks with tight phase alignment across outputs. Use Value: 0.7 ps RMS jitter ensures <1 UI eye opening degradation in 12G-SDI serial links over 100 m coaxial cable.

Ethernet Switch Timing

PCI Express 3.0 Clocking

Use Scenario: Synchronizing packet forwarding engines, MAC controllers, and SerDes PHYs across multi-port 10 GbE/25 GbE switches.

IC Role / Device Role / Timing Role: Primary clock source generating 125 MHz, 156.25 MHz, and 312.5 MHz reference clocks with sub-ps jitter for deterministic latency.

Use Value: Meets IEEE 802.3bj jitter compliance for 10GBASE-KR and 25GBASE-KR backplane interfaces.

Use Scenario: Providing common-clock architecture for CPU, GPU, and NVMe SSD controllers in server motherboards.

IC Role / Device Role / Timing Role: Quad-output generator delivering 100 MHz PCIe Gen3 reference clocks with SSC enabled on two outputs.

Use Value: Achieves <0.45 ps RMS jitter (10 kHz–50 MHz) required by PCI-SIG specification for Gen3 common clock mode.

FPGA Reference Clocking

Broadcast Video Timing

Use Scenario: Driving multiple high-end FPGAs (e.g., Xilinx Versal, Intel Stratix 10) requiring distinct clock domains for transceivers, fabric, and memory interfaces.

IC Role / Device Role / Timing Role: Configurable clock generator supplying 148.5 MHz, 297 MHz, and 74.25 MHz video clocks plus 100 MHz system clock.

Use Value: Independent VDDOx rails allow 1.8 V LVDS for transceivers and 3.3 V CMOS for configuration logic on same device.

Use Scenario: Generating SMPTE ST 2082 (12G-SDI) and ST 2081 (6G-SDI) reference clocks in broadcast cameras and routing switchers.

IC Role / Device Role / Timing Role: Low-jitter source for 74.25 MHz, 148.5 MHz, and 297 MHz pixel clocks with tight phase alignment across outputs.

Use Value: 0.7 ps RMS jitter ensures <1 UI eye opening degradation in 12G-SDI serial links over 100 m coaxial cable.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06889-GM	Higher integration: 8 outputs, integrated EEPROM, I²C programmability; 0.5 ps RMS jitter; supports 100 MHz–3.2 GHz.	Requires firmware initialization; not pin-compatible; suited for designs needing field reconfiguration or >4 outputs.	Select when design requires post-production frequency updates or additional outputs beyond four.
ICS8430I-01T	Fixed-frequency quad LVDS generator (100/125/156.25/200 MHz); no frequency synthesis; 1.2 ps RMS jitter; 32-QFN.	No any-frequency capability; no phase/frequency adjustment; limited to predefined telecom/datacom frequencies.	Select only for cost-sensitive, fixed-frequency applications where synthesis flexibility is unnecessary.

Compared with Si5332A-D06889-GM, SI5334C-B04801-GMR offers simpler pin-control operation without I²C overhead but lacks field reprogrammability; versus ICS8430I-01T, it provides full frequency agility and jitter performance headroom for next-generation serial link standards.

Availability

SI5334C-B04801-GMR is available at Aetrix Electronics and suitable for Ethernet switch/router timing, PCIe 3.0 clocking, and FPGA reference clocking requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across production lots.

Supply support for SI5334C-B04801-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5334 family is engineered as a pin-programmable, low-jitter clock generator platform targeting high-speed serial interface timing in networking, data center, and broadcast infrastructure equipment.

FAQ

What is the factory-programmed configuration of SI5334C-B04801-GMR?

The SI5334C-B04801-GMR is pre-programmed by Skyworks with a specific frequency plan and output configuration stored in one-time-programmable (OTP) memory. Upon power-up, it operates immediately without external configuration - the exact frequencies, formats, and voltage settings are defined in the part number's B04801 variant code and documented in Skyworks' standard frequency plans.

Does SI5334C-B04801-GMR support spread spectrum clocking (SSC)?

Yes, SI5334C-B04801-GMR supports PCIe 2.0-compliant spread spectrum on any output clock operating at 100 MHz, with ±0.5% frequency deviation at 30–33 kHz modulation rate. This feature is enabled via factory programming and does not require runtime control pins or I²C commands.

Can SI5334C-B04801-GMR generate 156.25 MHz and 312.5 MHz simultaneously on different outputs?

Yes, SI5334C-B04801-GMR can generate 156.25 MHz and 312.5 MHz simultaneously - both fall within the 0.16–350 MHz range supported by all output formats. The device uses independent MultiSynth dividers per output, enabling integer-related or unrelated frequencies without shared divider constraints.

What is the maximum output frequency achievable with LVDS format on SI5334C-B04801-GMR?

The maximum LVDS output frequency for SI5334C-B04801-GMR is 350 MHz under standard operating conditions. Higher frequencies (up to 710 MHz) are supported only for LVPECL and require specific MultiSynth configuration and verification per Skyworks Application Note AN562.

Is SI5334C-B04801-GMR compatible with 1.8 V core supply and 2.5 V output buffers?

Yes, SI5334C-B04801-GMR supports independent core (VDD) and output buffer (VDDOx) supplies. It operates with 1.8 V on VDD while simultaneously powering individual outputs at 2.5 V - enabling seamless interfacing between low-voltage logic cores and higher-voltage SerDes or memory interfaces.

SI5334C-B04801-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5334C-B04801-GMR FAQ

1.How can I place an order for SI5334C-B04801-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5334C-B04801-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5334C-B04801-GMR reliable?

The price and inventory of SI5334C-B04801-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5334C-B04801-GMR is usually 5 days.

3.What payment methods are accepted for SI5334C-B04801-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5334C-B04801-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5334C-B04801-GMR?

SI5334C-B04801-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5334C-B04801-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5334C-B04801-GMR?

For technical support, including SI5334C-B04801-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5334C-B04801-GMR requirements.

6.How does Aetrix verify that SI5334C-B04801-GMR is sourced from the original manufacturer or authorized distributors?

All SI5334C-B04801-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5334C-B04801-GMR meets industry standards.

7.What is the process for return or replacement of SI5334C-B04801-GMR?

All SI5334C-B04801-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5334C-B04801-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5334C-B04801-GMR part is unused and in its original packaging.

Return procedure for SI5334C-B04801-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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