Skyworks Solutions Inc. SI5334C-B04810-GM
- Part No.:
- SI5334C-B04810-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5334C-B04810-GM.pdf
- Description:
- 4-OUTPUT, ANY FREQUENCY(<200MHZ)
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5334C-B04810-GM from Skyworks Solutions is a pin-controlled, any-frequency quad clock generator with four independently configurable differential outputs, supporting frequencies up to 350 MHz (and select outputs to 710 MHz), 0.7 ps RMS typical phase jitter, and zero ppm frequency error via MultiSynth synthesis. It operates from 1.8/2.5/3.3 V core supply and accepts 8–30 MHz crystal or 5–710 MHz differential/single-ended reference inputs. It is used in PCIe 3.0 timing, FPGA clocking, and broadcast video systems.
For engineers reviewing the SI5334C-B04810-GM datasheet, SI5334C-B04810-GM pinout, SI5334C-B04810-GM application, or SI5334C-B04810-GM equivalent, key selection criteria include per-output voltage programmability (1.5/1.8/2.5/3.3 V), independent format support (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), glitchless 1 ppm frequency increment/decrement on CLK0A/B, and loss-of-signal/loss-of-lock monitoring.
Technical Context
The SI5334C-B04810-GM integrates a fractional-N PLL with on-chip VCO and four independent MultiSynth output dividers, enabling integer and fractional frequency synthesis on each of four differential outputs. Its input stage supports crystal (8–30 MHz) or wide-range AC/DC-coupled clock inputs (5–710 MHz).
Each output driver is fully configurable for signal format, output voltage (1.5/1.8/2.5/3.3 V), and termination, with dedicated VDDOx supplies. The device implements pin-controlled phase adjustment (±45 ns range, 20 ps step) and optional zero-delay mode using external feedback to FDBK/FDBKB pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count & type | 4 differential clock outputs, each independently configurable for frequency, format, and voltage |
| Frequency range | 0.16–350 MHz (all outputs); select frequencies up to 710 MHz on LVPECL/LVDS |
| Phase jitter (RMS) | 0.7 ps typical (12 kHz–20 MHz), meeting PCIe 3.0 and GbE jitter requirements |
| Core supply | 1.8 V, 2.5 V, or 3.3 V ±10%; supports mixed-voltage system integration |
| Input reference | 8–30 MHz crystal or 5–710 MHz clock (differential/SSTL/HSTL/CMOS) |
| Output formats | LVPECL, LVDS, HCSL, CMOS, SSTL, HSTL - selectable per output |
| Package | 24-pin QFN, 4 mm × 4 mm, 0.5 mm pitch, exposed thermal pad |
Pinout & Package
SI5334C-B04810-GM is housed in a 24-lead, 4 mm × 4 mm QFN package with exposed thermal pad (RoHS-compliant, lead-free). Pin assignments are fixed per the Si5334 family layout and validated for this variant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLK0A / CLK0B | Differential output pair 0 | Primary output channel with full frequency/phase/format configurability; supports 1 ppm glitchless frequency increment/decrement |
| CLK1A / CLK1B | Differential output pair 1 | Independent output with programmable voltage, format, and phase offset (±45 ns) |
| CLK2A / CLK2B | Differential output pair 2 | Third configurable output; supports same format and voltage options as CLK0/CLK1 |
| CLK3A / CLK3B | Differential output pair 3 | Fourth independent output; enables multi-domain clocking without external fanout buffers |
| IN1 / IN2, IN5 / IN6 | Differential reference inputs | Accept 5–710 MHz AC-coupled differential clocks; internal 100 Ω termination enabled |
| IN3 / IN4 | Single-ended reference inputs | Support CMOS/SSTL/HSTL inputs (5–350 MHz); require external biasing for DC-coupled operation |
| VDD, VDDO0–VDDO3 | Power supply terminals | VDD = core supply (1.8/2.5/3.3 V); VDDOx = per-output buffer supply (1.5/1.8/2.5/3.3 V) |
| LOSLOL | Loss-of-signal/loss-of-lock alarm | Open-drain output asserting low on input clock failure or PLL unlock; 3 mA sink capability |
| OEB | Output enable bar | Active-low global output disable; places all outputs in high-impedance state when asserted |
| RSVD_GND | Reserved ground | Internal connection; must be tied to PCB ground plane for thermal and noise integrity |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth frequency synthesis | Zero ppm frequency error across all outputs; supports any rational frequency ratio without external loop filters |
| Per-output voltage control | Independent VDDOx (1.5/1.8/2.5/3.3 V) enables direct interfacing with mixed-supply FPGAs, ASICs, and SerDes |
| Glitchless frequency tuning | 1 ppm step size on CLK0A/B with no output interruption - critical for margin testing and dynamic clock scaling |
| Sub-20 ps phase resolution | 20 ps phase increment/decrement steps over ±45 ns range - enables precise skew alignment in multi-lane interfaces |
| PCIe-compliant spread spectrum | SSC available on any 100 MHz output with 0.5% deviation at 30–33 kHz - reduces EMI without affecting timing margins |
Applications
| PCI Express 3.0 Timing | FPGA & ASIC Clock Distribution |
|---|---|
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe 3.0 root ports and endpoints in a server motherboard. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter (0.45 ps RMS) 100 MHz clocks with SSC enabled for EMI compliance. Use Value: Eliminates need for discrete fanout buffers and external jitter cleaners while meeting PCIe 3.0 total jitter < 33.6 ps pk-pk requirement. | Use Scenario: Driving clock inputs of heterogeneous FPGA banks (e.g., transceiver, logic, memory interface) requiring different voltages and frequencies. IC Role / Device Role / Timing Role: Single-chip source for 125 MHz LVDS (I/O bank), 156.25 MHz HCSL (transceivers), 200 MHz CMOS (memory controller), and 312.5 MHz LVPECL (SerDes). Use Value: Reduces BOM count by 4× versus discrete oscillators and simplifies layout with per-output voltage and format control. |
| Broadcast Video Timing | Telecom Line Card Synchronization |
Use Scenario: Generating SMPTE ST 2082 (27 MHz), ST 2081 (74.25 MHz), and ST 292 (27 MHz) reference clocks for HD/4K video encoders and routers. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact video standard frequencies with <1 ps RMS jitter to prevent frame sync errors. Use Value: Replaces multiple fixed-frequency XO modules; supports field reconfiguration for multi-standard broadcast equipment. | Use Scenario: Delivering 155.52 MHz (OC-3), 622.08 MHz (OC-12), and 2.488 GHz (OC-48) clocks to SONET/SDH framer ICs and PHYs on telecom line cards. IC Role / Device Role / Timing Role: High-stability clock generator with OC-12 compliant jitter (0.7 ps RMS) and loss-of-lock detection for network uptime monitoring. Use Value: Enables single-device timing solution across multiple SONET rates while providing real-time fault signaling via LOSLOL pin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-output clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5332A-D06880-GM | Higher integration: includes integrated crystal, I²C programmability, and enhanced jitter performance (0.35 ps RMS) | Requires firmware initialization; not pin-compatible; better suited for designs needing field reconfiguration | Select when design requires factory-programmed flexibility beyond pin-strapping and lower jitter is mandatory |
| ICS8430I-01T | Fixed-frequency output (no any-frequency synthesis); 4 LVDS outputs only; no per-output voltage control | Limited to pre-defined frequency plans; no spread spectrum or phase adjustment features | Select only for cost-sensitive, static-clock applications where frequency agility is unnecessary |
Compared with Si5332A-D06880-GM, SI5334C-B04810-GM offers simpler pin-control configuration and broader input reference support but lacks I²C reprogrammability. Compared with ICS8430I-01T, it provides full frequency agility and mixed-signal compatibility at higher complexity and cost.
Availability
SI5334C-B04810-GM is available at Aetrix Electronics and suitable for PCIe 3.0 timing, FPGA clock distribution, and broadcast video applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for SI5334C-B04810-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog products.
The Si5334 product line delivers pin-configurable, low-jitter clock generators for high-speed digital systems requiring flexible, reliable timing - designed specifically for PCIe, Ethernet, broadcast, and telecom infrastructure.
FAQ
What is the maximum output frequency supported by SI5334C-B04810-GM?
The SI5334C-B04810-GM supports up to 350 MHz on all four differential outputs using LVPECL, LVDS, or HCSL formats. Select frequencies extend to 710 MHz on LVPECL/LVDS outputs, subject to VCO operating constraints (Fvco/4 or Fvco/6). This capability is confirmed in Table 4 of the official Skyworks datasheet Rev. 1.3.
Does SI5334C-B04810-GM support crystal input?
Yes, SI5334C-B04810-GM supports 8–30 MHz fundamental-mode crystals directly connected to IN1/IN2 pins. On-chip load capacitance (11–13 pF) and drive-level control (≤100 µW) are optimized for stability. Crystal specifications are detailed in Tables 6–9 of the Skyworks datasheet Rev. 1.3.
Can SI5334C-B04810-GM generate different output voltages simultaneously?
Yes, SI5334C-B04810-GM supports independent output buffer supplies (VDDO0–VDDO3), allowing simultaneous 1.8 V LVDS, 2.5 V HCSL, 3.3 V CMOS, and 1.5 V SSTL outputs. Each VDDO pin must be decoupled locally, as specified in Section 7 of the Skyworks datasheet Rev. 1.3.
Is SI5334C-B04810-GM pin-compatible with other Si5334 variants?
Yes, all Si5334 variants-including SI5334C-B04810-GM-share identical 24-QFN pinout, electrical characteristics, and functional block diagram. Differences are limited to factory-programmed configuration (frequency plan, output format, voltage), not pin assignment or interface behavior.
What jitter performance does SI5334C-B04810-GM deliver for PCIe 3.0 applications?
SI5334C-B04810-GM delivers 0.15–0.45 ps RMS jitter (10 kHz–50 MHz) in PCIe 3.0 common-clocked mode, meeting the ≤0.45 ps RMS specification. This is measured per Table 10 of the Skyworks datasheet Rev. 1.3 using 100 MHz HCSL outputs and Intel Clock Jitter Tool v1.6.4.
SI5334C-B04810-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5334C-B04810-GM FAQ
1.How can I place an order for SI5334C-B04810-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5334C-B04810-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5334C-B04810-GM reliable?
The price and inventory of SI5334C-B04810-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5334C-B04810-GM is usually 5 days.
3.What payment methods are accepted for SI5334C-B04810-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5334C-B04810-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5334C-B04810-GM?
SI5334C-B04810-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5334C-B04810-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5334C-B04810-GM?
For technical support, including SI5334C-B04810-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5334C-B04810-GM requirements.
6.How does Aetrix verify that SI5334C-B04810-GM is sourced from the original manufacturer or authorized distributors?
All SI5334C-B04810-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5334C-B04810-GM meets industry standards.
7.What is the process for return or replacement of SI5334C-B04810-GM?
All SI5334C-B04810-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5334C-B04810-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5334C-B04810-GM part is unused and in its original packaging.
Return procedure for SI5334C-B04810-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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