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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5334C-B04813-GMR

Name: SI5334C-B04813-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5334C-B04813-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5334C-B04813-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5334C-B04813-GMR.pdf

Description:: 4-OUTPUT, ANY FREQUENCY(<200MHZ)

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5334C-B04813-GMR from Skyworks Solutions is a pin-controlled, any-frequency quad clock generator IC with four independently configurable differential outputs, 0.7 ps RMS typical phase jitter, 0 ppm frequency accuracy, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats up to 710 MHz - deployed in Ethernet switch/router, PCIe 3.0, and FPGA clocking systems.

For engineers reviewing the SI5334C-B04813-GMR datasheet, SI5334C-B04813-GMR pinout, SI5334C-B04813-GMR application, or SI5334C-B04813-GMR equivalent, key selection criteria include its factory-programmed configuration, 4×4 mm 24-QFN package, independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth-based fractional-N synthesis, and loss-of-lock/loss-of-signal alarm capability.

Technical Context

The SI5334C-B04813-GMR integrates a fully on-chip fractional-N PLL with phase detector, charge pump, loop filter, VCO, and R/M/N dividers, enabling integer or fractional frequency synthesis per output. Its dual-stage synthesis architecture uses a primary PLL (Stage 1) feeding four independent MultiSynth blocks (Stage 2), each with programmable M-divider and P-divider for zero-ppm output generation.

Input flexibility includes crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references; outputs support independent format selection, voltage supply (VDDOx = 1.4–3.63 V), and phase/frequency increment/decrement via dedicated pins (PINC/FINC, PDEC/FDEC), with <20 ps phase step resolution and 1 ppm frequency step size.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	4 differential clock outputs (CLK0A/B through CLK3A/B), each independently configurable
Frequency range	0.16–710 MHz per output; supports integer-related frequencies and select high-frequency points (e.g., 367–473.33 MHz, 550–710 MHz)
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), measured at 125 MHz output with 25 MHz reference, LVDS/HCSL/LVPECL format
Frequency accuracy	True 0 ppm error across all outputs due to MultiSynth fractional synthesis with no rounding error
Supply voltages	Core: 1.8 / 2.5 / 3.3 V; Output buffers: independently selectable 1.5 / 1.8 / 2.5 / 3.3 V per driver (VDDO0–VDDO3)
Operating temperature	–40 °C to +85 °C ambient, qualified for industrial applications with 37 °C/W θJA
Package	24-pin QFN, 4 mm × 4 mm, 0.5 mm pitch, exposed thermal pad

Pinout & Package

SI5334C-B04813-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5334 family and validated for this variant.

Pin/Terminal	Circuit Role	Design Meaning
IN1 / IN2	Differential reference input (primary)	Accepts AC-coupled differential clock (5–710 MHz); internal 100 Ω termination enabled
IN3 / IN4	Single-ended reference input	Supports CMOS/SSTL/HSTL (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A / CLK0B – CLK3A / CLK3B	Differential clock outputs	Four independent pairs; each configurable for LVPECL/LVDS/HCSL/CML/SSTL/HSTL with dedicated VDDOx supply
VDDO0 – VDDO3	Output buffer supply rails	Independent 1.4–3.63 V supplies per output pair; enables mixed-voltage system interfacing
VDD	Core supply	1.8 / 2.5 / 3.3 V core logic supply; IDD = 45 mA typical at 100 MHz on all outputs
LOSLOL	Loss-of-signal / loss-of-lock alarm output	Open-drain active-low flag; asserts within 5 µs of input loss or 5–10 ms after PLL unlock
OEB	Output enable / disable control	Active-low; disables all outputs simultaneously without affecting internal PLL operation
RSVD_GND	Reserved ground terminal	Internally connected to die substrate; must be tied to PCB ground plane for thermal and noise integrity

Key Features

Feature	Design Value
MultiSynth frequency synthesis	Four independent fractional-N synthesizers deliver zero-ppm accuracy and <0.7 ps RMS jitter without external loop filters
Pin-controlled phase adjustment	±45 ns range with <20 ps step resolution per output; enables precise inter-clock skew alignment in multi-FPGA systems
Glitchless frequency increment/decrement	1 ppm step size on CLK0A/B only; supports margin testing and dynamic frequency tuning without output interruption
PCIe-compliant spread spectrum	SSC available on any 100 MHz output with 0.5% deviation at 30–33 kHz; reduces EMI in high-speed serial interfaces
Zero-delay mode support	Optional external feedback path (FDBK/FDBKB) enables phase-aligned clock distribution with nullified propagation delay

Applications

Ethernet Switch/Router Timing	PCI Express 3.0 Clocking
Use Scenario: Synchronizing 10 GbE MACs, packet buffers, and switching fabric ASICs in Layer 3 switches with sub-100 ps skew tolerance. IC Role / Device Role / Timing Role: Primary clock generator providing four low-jitter, independently timed clocks (e.g., 156.25 MHz, 125 MHz, 100 MHz, 25 MHz) to separate functional blocks. Use Value: Enables deterministic packet forwarding by eliminating timing-induced buffer underflow/overflow; meets IEEE 802.3ae jitter compliance for 10GBASE-R.	Use Scenario: Supplying reference clocks to PCIe 3.0 root complex, endpoint devices, and switch chips in server motherboards. IC Role / Device Role / Timing Role: Generates compliant 100 MHz HCSL clocks with <0.45 ps RMS jitter (1.5–50 MHz band) and SSC capability for EMI reduction. Use Value: Ensures PCIe Gen3 link training success and long-term bit-error-rate stability; eliminates need for discrete jitter cleaners or multiple oscillators.
FPGA & Processor Clock Distribution	Broadcast Video/Audio Timing
Use Scenario: Driving multiple clock domains in Xilinx UltraScale+ or Intel Stratix 10 FPGAs - including transceiver refclk, fabric logic, DDR4 memory, and PCIe subsystems. IC Role / Device Role / Timing Role: Single-chip source for up to four distinct frequencies (e.g., 300 MHz GTY refclk, 100 MHz fabric, 200 MHz DDR4, 125 MHz PCIe) with independent voltage and format control. Use Value: Reduces BOM count and PCB area vs. discrete oscillators; simplifies power sequencing with independent VDDOx supplies.	Use Scenario: Generating SMPTE ST 2059-2–compliant PTP grandmaster clocks and genlock signals for 4K/8K video encoders, IP media gateways, and audio DSP farms. IC Role / Device Role / Timing Role: Synthesizes exact frequencies (e.g., 27 MHz, 74.25 MHz, 148.5 MHz, 297 MHz) with <1 ps cycle-cycle jitter for frame-accurate sample alignment. Use Value: Eliminates lip-sync drift and audio/video desynchronization in broadcast-over-IP workflows; meets ITU-R BT.2072 phase noise requirements.

Ethernet Switch/Router Timing

PCI Express 3.0 Clocking

Use Scenario: Synchronizing 10 GbE MACs, packet buffers, and switching fabric ASICs in Layer 3 switches with sub-100 ps skew tolerance.

IC Role / Device Role / Timing Role: Primary clock generator providing four low-jitter, independently timed clocks (e.g., 156.25 MHz, 125 MHz, 100 MHz, 25 MHz) to separate functional blocks.

Use Value: Enables deterministic packet forwarding by eliminating timing-induced buffer underflow/overflow; meets IEEE 802.3ae jitter compliance for 10GBASE-R.

Use Scenario: Supplying reference clocks to PCIe 3.0 root complex, endpoint devices, and switch chips in server motherboards.

IC Role / Device Role / Timing Role: Generates compliant 100 MHz HCSL clocks with <0.45 ps RMS jitter (1.5–50 MHz band) and SSC capability for EMI reduction.

Use Value: Ensures PCIe Gen3 link training success and long-term bit-error-rate stability; eliminates need for discrete jitter cleaners or multiple oscillators.

FPGA & Processor Clock Distribution

Broadcast Video/Audio Timing

Use Scenario: Driving multiple clock domains in Xilinx UltraScale+ or Intel Stratix 10 FPGAs - including transceiver refclk, fabric logic, DDR4 memory, and PCIe subsystems.

IC Role / Device Role / Timing Role: Single-chip source for up to four distinct frequencies (e.g., 300 MHz GTY refclk, 100 MHz fabric, 200 MHz DDR4, 125 MHz PCIe) with independent voltage and format control.

Use Value: Reduces BOM count and PCB area vs. discrete oscillators; simplifies power sequencing with independent VDDOx supplies.

Use Scenario: Generating SMPTE ST 2059-2–compliant PTP grandmaster clocks and genlock signals for 4K/8K video encoders, IP media gateways, and audio DSP farms.

IC Role / Device Role / Timing Role: Synthesizes exact frequencies (e.g., 27 MHz, 74.25 MHz, 148.5 MHz, 297 MHz) with <1 ps cycle-cycle jitter for frame-accurate sample alignment.

Use Value: Eliminates lip-sync drift and audio/video desynchronization in broadcast-over-IP workflows; meets ITU-R BT.2072 phase noise requirements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06889-GM	Higher integration: 8 outputs, integrated EEPROM, I²C programmability; 0.5 ps RMS jitter; supports JESD204B deterministic latency	Targeted at JESD204B SerDes, radar, and wireless infrastructure requiring multi-device synchronization	Select when field reconfiguration, higher channel count, or deterministic latency is required; not pin-compatible
ICS8430I-01T	Fixed-frequency quad LVDS generator (no synthesis); 0.8 ps RMS jitter; 3.3 V only; no phase/frequency adjustment	Suitable for legacy systems with static clock trees and no frequency agility needs	Select for cost-sensitive, non-synthesizing applications where configuration simplicity outweighs flexibility

Compared with SI5334C-B04813-GMR, Si5332A-D06889-GM adds I²C configurability and JESD204B support but requires layout changes and firmware integration, while ICS8430I-01T offers lower unit cost and simpler validation at the expense of frequency agility and zero-ppm synthesis.

Availability

SI5334C-B04813-GMR is available at Aetrix Electronics and suitable for Ethernet switch/router timing, PCIe 3.0 clocking, and FPGA/processor clock distribution requiring stable component supply across industrial temperature ranges and long production lifecycles.

Supply support for SI5334C-B04813-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog technologies for communications, automotive, and industrial markets.

The Si5334 product line delivers highly flexible, low-jitter clock generation for high-speed digital systems - designed specifically for applications demanding multi-frequency synthesis, mixed-signal interfacing, and robust jitter performance in space-constrained designs.

FAQ

What is the factory-programmed configuration of the SI5334C-B04813-GMR?

The SI5334C-B04813-GMR is pre-programmed at manufacture with a specific frequency plan and output configuration - including output frequencies, formats (e.g., LVDS), voltage levels (VDDOx), and pin-control settings. It operates autonomously at power-up without I²C or external configuration. The "B04813" suffix indicates this unique factory-defined configuration, verified in Skyworks' standard frequency plans documentation.

Does the SI5334C-B04813-GMR support spread spectrum clocking (SSC)?

Yes, the SI5334C-B04813-GMR supports PCIe 2.0–compliant spread spectrum on any output clock operating at exactly 100 MHz with Rn divider = 1. It delivers ±0.5% frequency deviation at 30–33 kHz modulation rate - reducing electromagnetic interference in high-density PCB layouts without violating PCIe timing budgets.

Can the SI5334C-B04813-GMR generate frequencies above 350 MHz?

Yes - the SI5334C-B04813-GMR supports select higher frequencies beyond 350 MHz: 367–473.33 MHz and 550–710 MHz. These are enabled via specific MultiSynth configurations and require use of LVPECL or CML output formats. Full 0.16–350 MHz coverage is guaranteed for all formats; higher bands are conditional on format and divider settings per Skyworks' Si5334 datasheet Table 4.

What is the function of the LOSLOL pin on the SI5334C-B04813-GMR?

The LOSLOL pin on the SI5334C-B04813-GMR is an open-drain, active-low alarm output that asserts within 2.6–5 µs of input clock loss (loss-of-signal) or 5–10 ms after PLL loss-of-lock. It connects directly to system monitoring circuitry or microcontroller GPIO to trigger fail-safe responses - such as clock source switchover or system reset - ensuring robust timing fault detection in mission-critical applications.

Is the SI5334C-B04813-GMR pin-compatible with other Si5334 variants?

Yes - all Si5334 variants, including SI5334C-B04813-GMR, share identical 24-QFN pinout, electrical interface, and mechanical footprint. Differences reside solely in factory-programmed configuration (frequency plan, output format, voltage settings), not hardware. This allows drop-in replacement across Si5334 family members when reprogramming is not required.

SI5334C-B04813-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5334C-B04813-GMR FAQ

1.How can I place an order for SI5334C-B04813-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5334C-B04813-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5334C-B04813-GMR reliable?

The price and inventory of SI5334C-B04813-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5334C-B04813-GMR is usually 5 days.

3.What payment methods are accepted for SI5334C-B04813-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5334C-B04813-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5334C-B04813-GMR?

SI5334C-B04813-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5334C-B04813-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5334C-B04813-GMR?

For technical support, including SI5334C-B04813-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5334C-B04813-GMR requirements.

6.How does Aetrix verify that SI5334C-B04813-GMR is sourced from the original manufacturer or authorized distributors?

All SI5334C-B04813-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5334C-B04813-GMR meets industry standards.

7.What is the process for return or replacement of SI5334C-B04813-GMR?

All SI5334C-B04813-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5334C-B04813-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5334C-B04813-GMR part is unused and in its original packaging.

Return procedure for SI5334C-B04813-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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