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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5334C-B05751-GM

Name: SI5334C-B05751-GM
Brand: Skyworks Solutions Inc.
SKU: SI5334C-B05751-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5334C-B05751-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5334C-B05751-GM.pdf

Description:: 4-OUTPUT, ANY FREQUENCY(<200MHZ)

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5334C-B05751-GM from Skyworks Solutions is a pin-controlled, quad-output any-frequency clock generator with four independently configurable differential clock outputs, 0.7 ps RMS typical phase jitter, 0 ppm frequency accuracy, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL signal formats - deployed in Ethernet switch timing, PCIe 3.0 clocking, and FPGA synchronization systems.

For engineers reviewing the SI5334C-B05751-GM datasheet, SI5334C-B05751-GM pinout, SI5334C-B05751-GM application, or SI5334C-B05751-GM equivalent, this device delivers factory-programmed, glitchless frequency tuning (1 ppm steps), ±45 ns programmable phase offset (<20 ps resolution), and zero-delay mode via external feedback - critical for low-jitter, multi-protocol clock distribution in high-speed digital systems.

Technical Context

The SI5334C-B05751-GM integrates a fractional-N PLL with patented MultiSynth synthesis per output, enabling independent non-integer frequency generation up to 350 MHz (select frequencies to 710 MHz) with <10 ps cycle-cycle jitter and 1.6 MHz loop bandwidth. Input flexibility includes 8–30 MHz crystal, 5–200 MHz CMOS, or 5–710 MHz differential reference.

Each of the four differential outputs supports independent voltage supply (1.5/1.8/2.5/3.3 V), format selection, and phase/frequency adjustment via dedicated control pins (PINC/FINC, PDEC/FDEC). Loss-of-signal (LOSLOL) and output-enable (OEB) pins provide real-time monitoring and power management without I²C interface.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical - enables compliance with PCIe 3.0 (≤0.45 ps RMS) and 10GbE timing budgets when configured with LVDS/HCSL outputs.
Output Frequency Range	0.16–350 MHz (LVPECL/LVDS), up to 710 MHz (select outputs) - supports simultaneous generation of PCIe 100 MHz, Ethernet 125 MHz, and processor core clocks.
Frequency Accuracy	0 ppm error - eliminates need for post-silicon calibration or trimming in precision timing applications.
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) - allows direct replacement of multiple discrete oscillators.
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: 1.5/1.8/2.5/3.3 V - enables mixed-voltage system integration with FPGAs, ASICs, and SerDes PHYs.
Package	24-pin QFN, 4 × 4 mm - fits high-density PCB layouts while maintaining thermal resistance θ_JA = 37 °C/W.
Operating Temperature	–40 to +85 °C - qualified for industrial and telecom line card environments.

Pinout & Package

SI5334C-B05751-GM is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments are fixed per Skyworks Si5334 family layout and validated for signal integrity in high-speed clock distribution.

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential Output Pair 0	LVPECL/LVDS/HCSL-configurable clock output; supports phase/frequency adjustment and spread spectrum (if enabled).
CLK1A / CLK1B	Differential Output Pair 1	Independent output with dedicated VDDO1 supply; usable for secondary domain clocking (e.g., memory interface).
CLK2A / CLK2B	Differential Output Pair 2	Configurable output supporting same format/voltage as CLK0/CLK1; used for auxiliary timing domains.
CLK3A / CLK3B	Differential Output Pair 3	Fourth independent output; supports HSTL/SSTL for memory subsystems or legacy logic interfaces.
IN1 / IN2	Differential Reference Input	Accepts 5–710 MHz AC-coupled differential clock; internal 10 kΩ termination enables direct connection to LVDS/HCSL sources.
IN3 / IN4	Single-Ended Reference Input	Supports 5–200 MHz CMOS-level input; VIH/VIL thresholds scale with VDD for robust noise margin.
IN5 / IN6	Secondary Differential Input	Redundant reference path for failover or dual-reference architectures; identical electrical specs to IN1/IN2.
IN7	Crystal Input (XTAL)	Connects to 8–30 MHz fundamental-mode crystal; on-chip load capacitance (12 pF typ) reduces external component count.
VDD	Core Supply	1.8/2.5/3.3 V supply for PLL, MultiSynth, and control logic; decoupling required per layout guidelines.
VDDO0–VDDO3	Output Buffer Supplies	Independent 1.5/1.8/2.5/3.3 V supplies per output pair - enables mixed-signal SoC interfacing without level shifters.
OEB	Output Enable (Active Low)	Hardware-controlled global disable; places all outputs in high-impedance state without affecting internal PLL operation.
LOSLOL	Loss-of-Signal/Loss-of-Lock Indicator	Open-drain alarm output asserting within 5 µs of input loss or PLL unlock - used for system fault detection and recovery.
RSVD_GND	Reserved Ground	Internally connected to die substrate; must be tied to PCB ground plane for EMI suppression and thermal conduction.

Key Features

Feature	Design Value
MultiSynth per Output	Four independent fractional-N synthesizers enable concurrent generation of unrelated frequencies (e.g., 100 MHz PCIe + 125 MHz GbE + 156.25 MHz SerDes) with zero ppm error.
Glitchless Frequency Tuning	Pin-controlled ±1 ppm step increments on CLK0A/B allow real-time margin testing and dynamic frequency scaling without output interruption.
Programmable Phase Offset	±45 ns range with <20 ps resolution per output - enables precise skew alignment across multi-lane interfaces (e.g., DDRx, PCIe lanes).
PCIe-Compliant Spread Spectrum	Available on any 100 MHz output with Rn divider = 1; –0.5% deviation at 30–33 kHz reduces EMI peaks without violating PCIe jitter limits.
Zero-Delay Mode	External feedback via FDBK/FDBKB pins eliminates static phase offset between reference and selected output - critical for clock forwarding applications.
Factory OTP Configuration	One-time programmable NVM stores full configuration (frequencies, formats, voltages, phase offsets); powers up ready-to-run with no host initialization required.

Applications

Ethernet Switch Timing	PCI Express 3.0 Clocking
Use Scenario: Synchronizing packet processing engines, MAC layers, and PHY interfaces in 1/10/25 GbE switches with deterministic latency. IC Role / Device Role / Timing Role: Quad-output clock generator providing independent 125 MHz, 156.25 MHz, and 312.5 MHz clocks to switch fabric, management CPU, and SerDes blocks. Use Value: Eliminates inter-clock skew and jitter accumulation across domains, enabling sub-100 ns timestamp accuracy and full-line-rate forwarding.	Use Scenario: Delivering compliant 100 MHz reference clocks to multiple PCIe 3.0 root complexes and endpoints in server motherboards. IC Role / Device Role / Timing Role: Primary clock source with HCSL outputs meeting PCIe 3.0 common-clock jitter spec (≤0.45 ps RMS) and SSC capability. Use Value: Reduces EMI by >10 dB at 100 MHz harmonics while maintaining <33.6 ps pk-pk total jitter - avoids costly board-level filtering.
FPGA and Processor Clocking	Broadcast Video/Audio Timing
Use Scenario: Driving high-speed transceivers, DDR4 memory controllers, and logic fabric in Xilinx Versal or Intel Agilex FPGAs. IC Role / Device Role / Timing Role: Configurable LVDS/LVPECL outputs delivering 100–350 MHz clocks with independent voltage rails for mixed-supply FPGA I/O banks. Use Value: Enables single-device clock tree for heterogeneous FPGA subsystems, reducing BOM count and layout complexity vs. discrete oscillators.	Use Scenario: Generating SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz video clocks in broadcast encoders and IP media gateways. IC Role / Device Role / Timing Role: Low-jitter (0.7 ps RMS) generator with phase alignment across outputs for genlock and frame-synchronized multi-channel encoding. Use Value: Achieves <±1 ppm frequency stability and <50 ps inter-output skew - meets ITU-R BT.2077-0 wander tolerance for professional video infrastructure.

Ethernet Switch Timing

PCI Express 3.0 Clocking

Use Scenario: Synchronizing packet processing engines, MAC layers, and PHY interfaces in 1/10/25 GbE switches with deterministic latency.

IC Role / Device Role / Timing Role: Quad-output clock generator providing independent 125 MHz, 156.25 MHz, and 312.5 MHz clocks to switch fabric, management CPU, and SerDes blocks.

Use Value: Eliminates inter-clock skew and jitter accumulation across domains, enabling sub-100 ns timestamp accuracy and full-line-rate forwarding.

Use Scenario: Delivering compliant 100 MHz reference clocks to multiple PCIe 3.0 root complexes and endpoints in server motherboards.

IC Role / Device Role / Timing Role: Primary clock source with HCSL outputs meeting PCIe 3.0 common-clock jitter spec (≤0.45 ps RMS) and SSC capability.

Use Value: Reduces EMI by >10 dB at 100 MHz harmonics while maintaining <33.6 ps pk-pk total jitter - avoids costly board-level filtering.

FPGA and Processor Clocking

Broadcast Video/Audio Timing

Use Scenario: Driving high-speed transceivers, DDR4 memory controllers, and logic fabric in Xilinx Versal or Intel Agilex FPGAs.

IC Role / Device Role / Timing Role: Configurable LVDS/LVPECL outputs delivering 100–350 MHz clocks with independent voltage rails for mixed-supply FPGA I/O banks.

Use Value: Enables single-device clock tree for heterogeneous FPGA subsystems, reducing BOM count and layout complexity vs. discrete oscillators.

Use Scenario: Generating SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz video clocks in broadcast encoders and IP media gateways.

IC Role / Device Role / Timing Role: Low-jitter (0.7 ps RMS) generator with phase alignment across outputs for genlock and frame-synchronized multi-channel encoding.

Use Value: Achieves <±1 ppm frequency stability and <50 ps inter-output skew - meets ITU-R BT.2077-0 wander tolerance for professional video infrastructure.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05751-GM	Higher integration: 8 outputs, integrated EEPROM, I²C programmability; 0.5 ps RMS jitter; 1.2 GHz max output.	Requires firmware initialization; suited for dynamically reconfigured systems (e.g., software-defined radio), not pin-strapped field deployment.	Select if I²C control, higher channel count, or lower jitter is prioritized over pin simplicity and zero-initialization startup.
ICS8430I-01T	Fixed-frequency quad LVDS generator (no synthesis); 1.2 ps RMS jitter; 200 MHz max; no phase/frequency tuning.	Limited to pre-defined frequencies; no spread spectrum or zero-delay mode; lacks MultiSynth flexibility.	Select only for cost-sensitive, static-frequency applications where programmability is unnecessary and jitter budget allows 1.2 ps RMS.

Compared with Si5332A-D05751-GM and ICS8430I-01T, the SI5334C-B05751-GM uniquely balances factory-programmed simplicity, pin-based real-time control, and 0.7 ps RMS jitter - making it optimal for industrial and telecom systems requiring guaranteed startup behavior and deterministic tuning without host processor involvement.

Availability

SI5334C-B05751-GM is available at Aetrix Electronics and suitable for Ethernet switch/router timing, PCIe 3.0 clocking, and FPGA synchronization applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5334C-B05751-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5334 product line was designed for high-performance, multi-protocol clock generation in data center, telecom, and broadcast equipment - emphasizing low jitter, pin configurability, and factory-programmed reliability without host intervention.

FAQ

What is the maximum output frequency supported by the SI5334C-B05751-GM?

The SI5334C-B05751-GM supports up to 350 MHz on all four differential outputs using LVPECL, LVDS, or HCSL formats. Select frequencies extend to 710 MHz - specifically for LVPECL outputs under defined conditions (e.g., Fvco/4 or Fvco/6 modes). This capability enables direct clocking of 10 GbE SerDes and high-speed FPGA transceivers without external frequency multipliers.

Does the SI5334C-B05751-GM require I²C programming to operate?

No. The SI5334C-B05751-GM uses one-time programmable (OTP) NVM to store its full configuration - including output frequencies, formats, voltages, phase offsets, and spread spectrum settings. It powers up and begins generating clocks immediately without host processor interaction or I²C initialization, making it ideal for headless or safety-critical systems.

Can the SI5334C-B05751-GM generate different signal formats simultaneously on its four outputs?

Yes. Each of the four differential output pairs (CLK0A/B through CLK3A/B) can be independently configured for LVPECL, LVDS, HCSL, CMOS, SSTL, or HSTL formats. Combined with independent VDDOx supplies (1.5/1.8/2.5/3.3 V), this allows direct interfacing with mixed-voltage SoCs, FPGAs, and memory controllers without external level shifters or translators.

How does the SI5334C-B05751-GM achieve 0 ppm frequency accuracy?

The SI5334C-B05751-GM achieves true 0 ppm frequency accuracy using Skyworks' patented MultiSynth fractional-N synthesis architecture. Unlike traditional PLLs with integer dividers that introduce rounding error, MultiSynth calculates exact rational frequency ratios - eliminating cumulative error across all four outputs, even at non-integer multiples of the reference clock.

Is spread spectrum clocking (SSC) supported on all outputs of the SI5334C-B05751-GM?

Spread spectrum is supported on any SI5334C-B05751-GM output clock operating at exactly 100 MHz with its Rn divider set to 1. It delivers –0.5% frequency deviation at 30–33 kHz, compliant with PCI Express 2.0 specifications. SSC is not available on other frequencies or outputs, and requires explicit factory programming during OTP configuration.

SI5334C-B05751-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5334C-B05751-GM FAQ

1.How can I place an order for SI5334C-B05751-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5334C-B05751-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5334C-B05751-GM reliable?

The price and inventory of SI5334C-B05751-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5334C-B05751-GM is usually 5 days.

3.What payment methods are accepted for SI5334C-B05751-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5334C-B05751-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5334C-B05751-GM?

SI5334C-B05751-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5334C-B05751-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5334C-B05751-GM?

For technical support, including SI5334C-B05751-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5334C-B05751-GM requirements.

6.How does Aetrix verify that SI5334C-B05751-GM is sourced from the original manufacturer or authorized distributors?

All SI5334C-B05751-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5334C-B05751-GM meets industry standards.

7.What is the process for return or replacement of SI5334C-B05751-GM?

All SI5334C-B05751-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5334C-B05751-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5334C-B05751-GM part is unused and in its original packaging.

Return procedure for SI5334C-B05751-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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