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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5334K-B05547-GMR

Name: SI5334K-B05547-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5334K-B05547-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5334K-B05547-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5334K-B05547-GMR.pdf

Description:: 4-OUTPUT, ANY FREQUENCY(<710MHZ)

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5334K-B05547-GMR from Skyworks Solutions is a pin-controlled, any-frequency quad clock generator IC with four independently configurable differential clock outputs. It synthesizes frequencies from 0.16 MHz to 710 MHz per output using MultiSynth fractional-N synthesis, delivers 0.7 ps RMS typical phase jitter, supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats, and operates from 1.8/2.5/3.3 V core and output supplies - deployed in PCIe 3.0 timing, FPGA clocking, and broadcast video systems.

For engineers reviewing the SI5334K-B05547-GMR datasheet, SI5334K-B05547-GMR pinout, SI5334K-B05547-GMR application, or SI5334K-B05547-GMR equivalent, key selection criteria include its 4-output independent frequency synthesis up to 710 MHz, factory-programmed configuration with no runtime initialization, 24-QFN package compatibility, and PCI Express–compliant spread-spectrum capability on 100 MHz outputs.

Technical Context

The SI5334K-B05547-GMR implements a two-stage synthesis architecture: a primary fractional-N PLL (phase detector, charge pump, loop filter, VCO) followed by four independent MultiSynth dividers - each supporting integer or fractional division for zero-ppm accuracy and sub-20 ps phase step resolution. Input flexibility includes crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references.

Each of the four differential output drivers features independent voltage supply (1.5/1.8/2.5/3.3 V), selectable signal format, and dedicated phase/frequency increment/decrement control via dedicated pins (PINC/FINC, PDEC/FDEC). The device supports optional zero-delay mode via external feedback and provides loss-of-lock (LOL) and loss-of-signal (LOS) alarms on the LOSLOL pin.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	4 differential clock outputs (CLK0A/B through CLK3A/B), each independently configurable
Frequency range per output	0.16–350 MHz (all formats); up to 710 MHz for LVPECL/LVDS with specific divider configurations
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), enabling compliance with PCIe 3.0 and 10 GbE jitter budgets
Core supply voltage	1.8 V, 2.5 V, or 3.3 V - supports mixed-voltage system integration without level-shifting
Output driver flexibility	LVPECL, LVDS, HCSL, CMOS, SSTL, HSTL - each output configurable to different format and voltage
Package	24-pin QFN, 4 mm × 4 mm - space-constrained PCB layout compatible with high-density timing applications
Operating temperature	–40 °C to +85 °C - qualified for industrial and telecom line card environments

Pinout & Package

SI5334K-B05547-GMR is housed in a 24-lead, 4 mm × 4 mm QFN package with exposed thermal pad. Pin assignments follow Skyworks' standard Si5334 pinout: dual differential inputs (IN1/IN2, IN5/IN6), single-ended inputs (IN3, IN4), four differential output pairs (CLK0A/B–CLK3A/B), three output supply rails (VDDO0–VDDO3), core supply (VDD), control pins (OEB, LOSLOL), and reserved ground (RSVD_GND).

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential output pair 0	Configurable as LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL; supports phase/frequency adjustment
CLK1A / CLK1B	Differential output pair 1	Independent frequency/format/voltage setting; no shared resources with other outputs
CLK2A / CLK2B	Differential output pair 2	Full MultiSynth synthesis capability; supports up to 710 MHz with LVPECL/LVDS
CLK3A / CLK3B	Differential output pair 3	Factory-programmed output; retains configuration across power cycles without I²C
IN1 / IN2, IN5 / IN6	Differential reference inputs	Accept 5–710 MHz AC-coupled differential clocks; internal 100 Ω termination support
IN3 / IN4	Single-ended reference inputs	Support CMOS/SSTL/HSTL inputs up to 350 MHz; 1.0 V/ns minimum slew rate recommended
VDDO0–VDDO3	Output buffer supply rails	Independent 1.5/1.8/2.5/3.3 V supplies per output pair - enables mixed-signal interface
VDD	Core supply	1.8/2.5/3.3 V ±10%; powers PLL, MultiSynth logic, and NVM - decoupling critical for jitter performance
OEB	Output enable bar	Active-low global output disable; synchronous assertion prevents glitches on all outputs
LOSLOL	Loss-of-signal/loss-of-lock alarm	Open-drain output asserting within 5 µs of input failure or PLL unlock - used for system fault monitoring

Key Features

Feature	Design Value
MultiSynth fractional-N synthesis	Enables any-frequency output generation (0.16–710 MHz) with zero ppm error and <0.7 ps RMS jitter
Independent output voltage per driver	Each of four outputs supports 1.5/1.8/2.5/3.3 V VDDO - eliminates external level shifters in multi-rail systems
Pin-controlled phase adjustment	±45 ns range in <20 ps steps per output - enables deterministic skew tuning without software or I²C
PCIe-compliant spread spectrum	Available on any 100 MHz output; –0.5% deviation at 30–33 kHz - reduces EMI without affecting timing margins
Zero-delay feedback mode	External feedback path via FDBK/FDBKB pins nullifies reference-to-output phase offset - ideal for clock forwarding

Applications

PCI Express 3.0 Timing	FPGA & Processor Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe 3.0 root ports and endpoints in a server motherboard. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter, spread-spectrum-enabled 100 MHz clocks with independent phase alignment. Use Value: Meets PCIe 3.0 total jitter spec (<33.6 ps pk-pk) while reducing EMI via hardware-controlled SSC - no firmware overhead required.	Use Scenario: Supplying distinct clock domains (e.g., 156.25 MHz for transceivers, 100 MHz for AXI bus, 50 MHz for peripherals) to a Xilinx Kintex Ultrascale+ FPGA. IC Role / Device Role / Timing Role: Any-frequency clock synthesizer generating non-integer-related frequencies from a single crystal reference. Use Value: Eliminates need for multiple crystals or discrete oscillators; factory-programmed configuration ensures deterministic startup without FPGA configuration time penalty.
Broadcast Video Timing	Telecom Line Cards
Use Scenario: Generating SMPTE ST 2042–compliant 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks for HD/4K video encoder/decoder ASICs. IC Role / Device Role / Timing Role: High-precision clock generator with <1 ppm frequency accuracy and sub-10 ps cycle-cycle jitter. Use Value: Ensures frame-accurate synchronization across multiple video processing pipelines - critical for genlock and lip-sync compliance.	Use Scenario: Delivering OC-12 (155.52 MHz), SONET/SDH, and Ethernet (125 MHz) clocks to multiple PHYs and DSPs on a carrier-grade line card. IC Role / Device Role / Timing Role: Multi-format clock source supporting LVDS, HCSL, and CMOS outputs simultaneously at telecom-grade stability. Use Value: Single-device solution replaces multiple clock ICs; wide temperature range (–40 to +85 °C) and robust LOS/LOL monitoring meet NEBS Level 3 requirements.

PCI Express 3.0 Timing

FPGA & Processor Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe 3.0 root ports and endpoints in a server motherboard.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter, spread-spectrum-enabled 100 MHz clocks with independent phase alignment.

Use Value: Meets PCIe 3.0 total jitter spec (<33.6 ps pk-pk) while reducing EMI via hardware-controlled SSC - no firmware overhead required.

Use Scenario: Supplying distinct clock domains (e.g., 156.25 MHz for transceivers, 100 MHz for AXI bus, 50 MHz for peripherals) to a Xilinx Kintex Ultrascale+ FPGA.

IC Role / Device Role / Timing Role: Any-frequency clock synthesizer generating non-integer-related frequencies from a single crystal reference.

Use Value: Eliminates need for multiple crystals or discrete oscillators; factory-programmed configuration ensures deterministic startup without FPGA configuration time penalty.

Broadcast Video Timing

Telecom Line Cards

Use Scenario: Generating SMPTE ST 2042–compliant 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks for HD/4K video encoder/decoder ASICs.

IC Role / Device Role / Timing Role: High-precision clock generator with <1 ppm frequency accuracy and sub-10 ps cycle-cycle jitter.

Use Value: Ensures frame-accurate synchronization across multiple video processing pipelines - critical for genlock and lip-sync compliance.

Use Scenario: Delivering OC-12 (155.52 MHz), SONET/SDH, and Ethernet (125 MHz) clocks to multiple PHYs and DSPs on a carrier-grade line card.

IC Role / Device Role / Timing Role: Multi-format clock source supporting LVDS, HCSL, and CMOS outputs simultaneously at telecom-grade stability.

Use Value: Single-device solution replaces multiple clock ICs; wide temperature range (–40 to +85 °C) and robust LOS/LOL monitoring meet NEBS Level 3 requirements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05547-GM	8-output, higher integration (integrated LDOs, I²C programmability), lower jitter (0.5 ps RMS), larger 32-QFN package	Requires I²C host controller; better suited for dynamic reconfiguration; not pin-compatible	Select when system needs >4 outputs, runtime frequency changes, or tighter jitter specs - accept added firmware complexity
ICS8430I-01T	4-output, fixed-frequency (non-synthesizing), LVDS-only, 1.2 ps RMS jitter, 3.3 V only, 24-TSSOP package	No frequency flexibility; limited to pre-defined outputs; no spread spectrum or phase adjustment	Select only for cost-sensitive, static-clock applications where frequency agility and advanced features are unnecessary

Compared with Si5332A-D05547-GM and ICS8430I-01T, SI5334K-B05547-GMR uniquely balances pin-controlled simplicity, full any-frequency synthesis, and PCIe-compliant spread spectrum in a compact 24-QFN - making it optimal for fixed-function, high-integrity timing where runtime programmability is not required.

Availability

SI5334K-B05547-GMR is available at Aetrix Electronics and suitable for PCIe 3.0 timing, FPGA clocking, and broadcast video applications requiring stable component supply, long-term lifecycle assurance, and guaranteed traceable sourcing.

Supply support for SI5334K-B05547-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog ICs for infrastructure, automotive, and mobile markets.

The SI5334K-B05547-GMR belongs to Skyworks' Si533x family of any-frequency clock generators - designed specifically for high-reliability, low-jitter timing in datacenter, telecom, and broadcast equipment where deterministic startup and hardware-controlled flexibility are essential.

FAQ

What is the maximum output frequency supported by SI5334K-B05547-GMR?

The SI5334K-B05547-GMR supports up to 710 MHz on LVPECL and LVDS outputs under specific MultiSynth divider configurations (e.g., Fvco/4 or Fvco/6 modes). For general-purpose use across all output formats, the guaranteed range is 0.16–350 MHz. Frequencies above 350 MHz require validation per Table 4 in the datasheet and are limited to two unique high-frequency outputs simultaneously.

Does SI5334K-B05547-GMR require I²C programming during operation?

No. SI5334K-B05547-GMR is factory-programmed with OTP NVM and begins operation immediately after power-up with no host intervention. All configuration - including output frequencies, formats, voltages, and spread-spectrum settings - is stored permanently. I²C is not implemented on this variant; control is exclusively via pins (OEB, PINC/FINC, PDEC/FDEC, SSPB).

Can SI5334K-B05547-GMR generate different output formats simultaneously?

Yes. SI5334K-B05547-GMR supports simultaneous LVPECL, LVDS, HCSL, CMOS, SSTL, and HSTL outputs - one format per output pair (CLK0A/B through CLK3A/B). Each output has its own VDDO rail, allowing independent voltage selection (1.5/1.8/2.5/3.3 V) and eliminating level-shifter components in heterogeneous system interfaces.

What is the purpose of the LOSLOL pin on SI5334K-B05547-GMR?

The LOSLOL pin on SI5334K-B05547-GMR is an open-drain alarm output that asserts low within 5 µs of detecting either loss-of-signal (on any input clock) or loss-of-lock (PLL unlock). It serves as a hardware fault indicator for system-level monitoring and fail-safe response - no software polling or I²C reads required.

Is SI5334K-B05547-GMR compatible with PCIe 3.0 jitter specifications?

Yes. SI5334K-B05547-GMR delivers 0.15–0.45 ps RMS jitter (10 kHz–50 MHz) on 100 MHz HCSL outputs, well within the PCIe 3.0 common-clock total jitter limit of <33.6 ps pk-pk. Its measured 0.7 ps RMS phase jitter (12 kHz–20 MHz) and deterministic jitter <10 ps pk-pk further ensure robust link training and error-free operation.

SI5334K-B05547-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5334K-B05547-GMR FAQ

1.How can I place an order for SI5334K-B05547-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5334K-B05547-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5334K-B05547-GMR reliable?

The price and inventory of SI5334K-B05547-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5334K-B05547-GMR is usually 5 days.

3.What payment methods are accepted for SI5334K-B05547-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5334K-B05547-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5334K-B05547-GMR?

SI5334K-B05547-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5334K-B05547-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5334K-B05547-GMR?

For technical support, including SI5334K-B05547-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5334K-B05547-GMR requirements.

6.How does Aetrix verify that SI5334K-B05547-GMR is sourced from the original manufacturer or authorized distributors?

All SI5334K-B05547-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5334K-B05547-GMR meets industry standards.

7.What is the process for return or replacement of SI5334K-B05547-GMR?

All SI5334K-B05547-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5334K-B05547-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5334K-B05547-GMR part is unused and in its original packaging.

Return procedure for SI5334K-B05547-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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