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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5334M-B02080-GM

Name: SI5334M-B02080-GM
Brand: Skyworks Solutions Inc.
SKU: SI5334M-B02080-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5334M-B02080-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5334M-B02080-GM.pdf

Description:: 4-OUTPUT, ANY FREQUENCY(<200MHZ)

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5334M-B02080-GM from Skyworks Solutions is a pin-controlled, any-frequency quad clock generator with four independently configurable differential outputs, 0.7 ps RMS typical phase jitter, 0 ppm frequency accuracy, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats up to 710 MHz - deployed in Ethernet switch/router and PCI Express 3.0 timing systems.

For engineers reviewing the SI5334M-B02080-GM datasheet, SI5334M-B02080-GM pinout, SI5334M-B02080-GM application, or SI5334M-B02080-GM equivalent, this device delivers deterministic phase adjustment (<20 ps steps), glitchless 1 ppm frequency increment/decrement on CLK0A/B, loss-of-lock/loss-of-signal alarms, and factory-programmed configuration enabling immediate operation at power-up without host intervention.

Technical Context

The SI5334M-B02080-GM integrates a fractional-N PLL with patented MultiSynth synthesis per output, supporting independent integer/fractional division across four output channels. Its input stage accepts 8–30 MHz crystals or 5–710 MHz differential/single-ended clocks, while each output driver supports programmable voltage (1.5/1.8/2.5/3.3 V) and format selection.

It implements zero-delay mode via external feedback to FDBK/FDBKB pins, enables phase offset tuning (±45 ns range), and provides spread spectrum on 100 MHz outputs compliant with PCI Express 2.0 - all controlled by dedicated pins without I²C or SPI interface.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	4 differential clock outputs (CLK0A/B, CLK1A/B, CLK2A/B, CLK3A/B), each independently configurable
Frequency range	0.16–350 MHz (all formats); up to 710 MHz for LVPECL/LVDS with specific divider settings
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), validated for GbE and OC-12 applications
Frequency accuracy	True 0 ppm error across all outputs due to MultiSynth fractional synthesis
Supply voltages	Core: 1.8/2.5/3.3 V; Output buffers: 1.4–3.63 V, independently assignable per channel
Operating temperature	–40 °C to +85 °C ambient, qualified for industrial and telecom line card environments
Package	24-pin QFN, 4 mm × 4 mm, 0.5 mm pitch, exposed thermal pad

Pinout & Package

SI5334M-B02080-GM is housed in a 24-lead, 4 mm × 4 mm QFN package with exposed thermal pad (pin 1 marked by dot). Pin functions are defined per Skyworks Rev. 1.3 datasheet, with dedicated inputs (IN1–IN7), outputs (CLK0A/B through CLK3A/B), supply rails (VDD, VDDO0–VDDO3), control (OEB, LOSLOL), and reserved ground (RSVD_GND).

Pin/Terminal	Circuit Role	Design Meaning
IN1/IN2, IN5/IN6	Differential reference input	Accepts 5–710 MHz AC-coupled differential clock; requires external 100 Ω termination
IN3/IN4	Single-ended reference input	Supports CMOS/SSTL/HSTL inputs from 5–350 MHz; VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A/CLK0B – CLK3A/CLK3B	Differential clock outputs	Four independent pairs; each configurable for LVPECL/LVDS/HCSL/CML/SSTL/HSTL
VDDO0–VDDO3	Output buffer supply	Independent 1.4–3.63 V supplies per output pair; sets output swing and common-mode voltage
OEB	Output enable bar	Active-low global output disable; high-Z state when asserted
LOSLOL	Loss-of-signal/loss-of-lock alarm	Open-drain output asserting low on input clock failure or PLL unlock
VDD	Core supply	1.8/2.5/3.3 V ± tolerance; powers PLL, MultiSynth, and control logic
RSVD_GND	Reserved ground	Internally connected to die substrate; must be tied to PCB ground plane

Key Features

Feature	Design Value
MultiSynth per-output synthesis	Enables independent any-frequency generation (0.16–710 MHz) with zero ppm error and <0.7 ps RMS jitter
Pin-controlled frequency tuning	Glitchless 1 ppm step size on CLK0A/B, supporting margin testing and dynamic frequency adaptation
Programmable phase offset	±45 ns range with <20 ps resolution per output, enabling precise inter-clock alignment in multi-FPGA systems
Spread spectrum clocking (SSC)	PCI Express 2.0-compliant modulation (30–33 kHz, ±0.5%) on any 100 MHz output for EMI reduction
Zero-delay feedback mode	External feedback to FDBK/FDBKB pins eliminates static phase offset between reference and selected output
Loss detection & alarm	Dedicated LOSLOL pin asserts low within 5 µs of input loss or 5–10 ms of PLL unlock for system fault monitoring

Applications

Ethernet Switch/Router Timing	PCI Express 3.0 Clocking
Use Scenario: Synchronizing packet processing engines, SerDes lanes, and management controllers in 1/10 GbE line cards. IC Role / Device Role / Timing Role: Primary clock source generating 125 MHz, 156.25 MHz, and 250 MHz clocks with sub-ps jitter for PHY/MAC layer timing compliance. Use Value: Meets IEEE 802.3 clause 49 jitter limits (≤1.0 ps RMS) and ensures deterministic latency across multi-lane switch fabrics.	Use Scenario: Providing reference clocks to PCIe root complex, endpoint devices, and switch ICs in server and storage platforms. IC Role / Device Role / Timing Role: Generating 100 MHz differential HCSL clocks with PCIe 3.0-compliant RMS jitter ≤0.45 ps for Gen3 link training stability. Use Value: Eliminates need for multiple discrete oscillators; single SI5334M-B02080-GM replaces up to four fixed-frequency XO sources.
Broadcast Video/Audio Timing	FPGA & Processor Clocking
Use Scenario: Delivering genlock-capable pixel clocks (e.g., 74.25 MHz, 148.5 MHz) and audio sample rates (48 kHz, 96 kHz) in SDI routers and IP media gateways. IC Role / Device Role / Timing Role: Any-frequency synthesis engine producing SMPTE ST 2082–1–compliant video clocks with <10 ps cycle-cycle jitter. Use Value: Enables frame-accurate synchronization across mixed-format video pipelines without external PLL re-timing.	Use Scenario: Supplying core, memory, and peripheral clocks to Xilinx Kintex/Virtex and Intel Stratix FPGA families in industrial control and test equipment. IC Role / Device Role / Timing Role: Configurable multi-rail clock generator delivering 100–300 MHz LVDS clocks and 50 MHz CMOS clocks from one compact footprint. Use Value: Reduces BOM count and layout complexity versus discrete crystal+buffer solutions while maintaining <30 ps period jitter.

Ethernet Switch/Router Timing

PCI Express 3.0 Clocking

Use Scenario: Synchronizing packet processing engines, SerDes lanes, and management controllers in 1/10 GbE line cards.

IC Role / Device Role / Timing Role: Primary clock source generating 125 MHz, 156.25 MHz, and 250 MHz clocks with sub-ps jitter for PHY/MAC layer timing compliance.

Use Value: Meets IEEE 802.3 clause 49 jitter limits (≤1.0 ps RMS) and ensures deterministic latency across multi-lane switch fabrics.

Use Scenario: Providing reference clocks to PCIe root complex, endpoint devices, and switch ICs in server and storage platforms.

IC Role / Device Role / Timing Role: Generating 100 MHz differential HCSL clocks with PCIe 3.0-compliant RMS jitter ≤0.45 ps for Gen3 link training stability.

Use Value: Eliminates need for multiple discrete oscillators; single SI5334M-B02080-GM replaces up to four fixed-frequency XO sources.

Broadcast Video/Audio Timing

FPGA & Processor Clocking

Use Scenario: Delivering genlock-capable pixel clocks (e.g., 74.25 MHz, 148.5 MHz) and audio sample rates (48 kHz, 96 kHz) in SDI routers and IP media gateways.

IC Role / Device Role / Timing Role: Any-frequency synthesis engine producing SMPTE ST 2082–1–compliant video clocks with <10 ps cycle-cycle jitter.

Use Value: Enables frame-accurate synchronization across mixed-format video pipelines without external PLL re-timing.

Use Scenario: Supplying core, memory, and peripheral clocks to Xilinx Kintex/Virtex and Intel Stratix FPGA families in industrial control and test equipment.

IC Role / Device Role / Timing Role: Configurable multi-rail clock generator delivering 100–300 MHz LVDS clocks and 50 MHz CMOS clocks from one compact footprint.

Use Value: Reduces BOM count and layout complexity versus discrete crystal+buffer solutions while maintaining <30 ps period jitter.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05880-GM	Higher integration: includes integrated crystal; supports up to 10 outputs; lower jitter (0.5 ps RMS typical)	Targeted at space-constrained designs requiring crystal-less BOM; not pin-compatible	Select when eliminating external crystal and needing >4 outputs; requires layout revision
ICS8430I-01T	Fixed-frequency only (no any-frequency synthesis); 4 LVDS outputs; 1.2 ps RMS jitter; no phase/frequency tuning	Suitable for cost-sensitive, static-clock applications where frequency flexibility is unnecessary	Choose for legacy designs with fixed 100/125 MHz requirements and no need for field tuning or SSC

Compared with Si5332A-D05880-GM and ICS8430I-01T, the SI5334M-B02080-GM uniquely balances pin-controlled configurability, 0 ppm synthesis accuracy, and industrial temperature operation in a 4×4 mm QFN - making it optimal for PCIe/Ethernet systems requiring field-adjustable timing without firmware overhead.

Availability

SI5334M-B02080-GM is available at Aetrix Electronics and suitable for Ethernet switch/router timing, PCI Express 3.0 clocking, broadcast video/audio synchronization, and FPGA processor clocking requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for SI5334M-B02080-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, timing, and precision analog solutions for communications infrastructure, automotive, and industrial markets.

The Si5334 family was designed for high-flexibility, low-jitter clock generation in multi-protocol systems - specifically targeting applications demanding independent, any-frequency synthesis without software configuration overhead.

FAQ

What is the maximum output frequency supported by SI5334M-B02080-GM?

The SI5334M-B02080-GM supports up to 710 MHz on LVPECL/LVDS outputs under specific MultiSynth divider configurations (Fvco/4 or Fvco/6 modes), while full any-frequency synthesis up to 350 MHz is guaranteed across all supported formats including HCSL, CMOS, SSTL, and HSTL. Operation above 350 MHz requires validation per Skyworks AN562 and is limited to two simultaneous high-frequency outputs.

Does SI5334M-B02080-GM require an external configuration EEPROM or I²C interface?

No. The SI5334M-B02080-GM uses one-time-programmable (OTP) NVM for factory configuration and operates immediately at power-up without external memory or serial interface. All settings - including output frequencies, formats, voltages, and spread spectrum - are stored internally and activated autonomously.

Can SI5334M-B02080-GM generate different output formats simultaneously?

Yes. SI5334M-B02080-GM supports mixed output formats: for example, CLK0A/B as LVDS (125 MHz), CLK1A/B as HCSL (100 MHz), CLK2A/B as CMOS (50 MHz), and CLK3A/B as SSTL (200 MHz) - each with independent VDDO supply and signal integrity optimization.

What is the purpose of the LOSLOL pin on SI5334M-B02080-GM?

The LOSLOL pin on SI5334M-B02080-GM is an open-drain alarm output that asserts low within 2.6–5 µs of input clock loss (LOS) or 5–10 ms of PLL unlock (LOL), providing real-time fault indication to system supervisors or microcontrollers without requiring additional monitoring circuitry.

Is SI5334M-B02080-GM compatible with PCIe 3.0 jitter specifications?

Yes. SI5334M-B02080-GM delivers ≤0.45 ps RMS jitter (10 kHz–50 MHz) on 100 MHz HCSL outputs, meeting PCI Express 3.0 Common Clock jitter requirements. This performance is verified per Intel Clock Jitter Tool v1.6.4 and documented in Table 10 of the Skyworks Si5334 datasheet Rev. 1.3.

SI5334M-B02080-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5334M-B02080-GM FAQ

1.How can I place an order for SI5334M-B02080-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5334M-B02080-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5334M-B02080-GM reliable?

The price and inventory of SI5334M-B02080-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5334M-B02080-GM is usually 5 days.

3.What payment methods are accepted for SI5334M-B02080-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5334M-B02080-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5334M-B02080-GM?

SI5334M-B02080-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5334M-B02080-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5334M-B02080-GM?

For technical support, including SI5334M-B02080-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5334M-B02080-GM requirements.

6.How does Aetrix verify that SI5334M-B02080-GM is sourced from the original manufacturer or authorized distributors?

All SI5334M-B02080-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5334M-B02080-GM meets industry standards.

7.What is the process for return or replacement of SI5334M-B02080-GM?

All SI5334M-B02080-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5334M-B02080-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5334M-B02080-GM part is unused and in its original packaging.

Return procedure for SI5334M-B02080-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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