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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5334M-B04346-GM

Name: SI5334M-B04346-GM
Brand: Skyworks Solutions Inc.
SKU: SI5334M-B04346-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5334M-B04346-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5334M-B04346-GM.pdf

Description:: 4-OUTPUT, ANY FREQUENCY(<200MHZ)

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5334M-B04346-GM from Skyworks Solutions is a pin-controlled, quad-output any-frequency clock generator with four independently configurable differential clock outputs, 0.7 ps RMS typical phase jitter, 0 ppm frequency accuracy, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats up to 710 MHz - deployed in Ethernet switches, PCIe 3.0 systems, and FPGA clocking.

For engineers reviewing the SI5334M-B04346-GM datasheet, SI5334M-B04346-GM pinout, SI5334M-B04346-GM application, or SI5334M-B04346-GM equivalent, key selection considerations include its 24-pin 4×4 mm QFN package, factory-programmed configuration, independent output voltage per driver (1.5/1.8/2.5/3.3 V), and MultiSynth-based fractional-N synthesis enabling glitchless 1 ppm frequency adjustment on CLK0A/B.

Technical Context

The SI5334M-B04346-GM implements a two-stage synthesis architecture: a primary PLL (phase detector, charge pump, loop filter, VCO) followed by four independent MultiSynth fractional-N dividers - each driving one of four differential outputs. Input flexibility includes crystal (8–30 MHz) or differential/SE clock inputs (5–710 MHz).

Each output supports independent signal format selection, reference voltage (VDDOx = 1.4–3.63 V), and phase offset (±45 ns in <20 ps steps). The device operates across –40 to +85 °C with core supply options of 1.8/2.5/3.3 V and delivers 45 mA typical core current at 100 MHz on all outputs with 25 MHz reference.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	4 differential clock outputs (CLK0A/B, CLK1A/B, CLK2A/B, CLK3A/B), each independently configurable
Frequency range	0.16–350 MHz (all formats); up to 710 MHz for LVPECL/LVDS with integer-related constraints
Phase jitter (RMS)	0.7 ps typical (12 kHz–20 MHz), validated for GbE and OC-12 applications
Frequency accuracy	True 0 ppm error via MultiSynth fractional-N synthesis - no calibration required
Input reference	Crystal (8–30 MHz) or clock input: CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently selectable 1.5/1.8/2.5/3.3 V per driver
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch, exposed thermal pad

Pinout & Package

SI5334M-B04346-GM is housed in a 24-pin, 4 × 4 mm QFN package with exposed thermal pad (pin 24 = GND). Pin assignments follow Skyworks' standard Si5334 top-view layout: IN1/IN2 (diff input A), IN3/IN4 (SE inputs), IN5/IN6 (diff input B), CLK0A–CLK3B (four differential output pairs), VDD (core supply), VDDO0–VDDO3 (independent output buffer supplies), LOSLOL (loss-of-signal/loss-of-lock alarm), OEB (output enable), and RSVD_GND.

Pin/Terminal	Circuit Role	Design Meaning
IN1 / IN2	Differential reference input A	Accepts 5–710 MHz AC-coupled differential clock; requires external 100 Ω termination
IN3 / IN4	Single-ended reference inputs	Support CMOS/SSTL/HSTL clocks (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A / CLK0B	Differential output 0	Primary output with pin-controlled frequency increment/decrement (1 ppm steps, glitchless)
CLK1A / CLK1B	Differential output 1	Fully programmable frequency/format/voltage; supports phase offset ±45 ns
VDDO0–VDDO3	Independent output buffer supplies	Enable mixed-voltage system interfacing (e.g., 1.8 V FPGA core + 3.3 V PHY)
LOSLOL	Open-drain alarm output	Asserts low on loss-of-signal (2.6–5 µs) or loss-of-lock (5–10 ms); requires 1 kΩ pull-up
OEB	Output enable control	Active-low; disables all outputs simultaneously without affecting internal PLL operation

Key Features

Feature	Design Value
MultiSynth fractional-N synthesis	Enables any-frequency output generation (0.16–710 MHz) with zero ppm error and 0.7 ps RMS jitter
Independent output configuration	Each of four outputs supports unique format (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), voltage (1.5–3.3 V), and frequency
Glitchless frequency tuning	CLK0A/B supports 1 ppm step size frequency increment/decrement at ≤1.5 MHz update rate - no output interruption
Sub-20 ps phase resolution	Programmable initial phase offset and real-time phase adjustment (±45 ns range, <20 ps step)
PCIe 2.0-compliant spread spectrum	SSC available on any 100 MHz output with –0.5% deviation at 30–33 kHz - reduces EMI without violating spec
Zero-delay feedback mode	Optional external feedback path (FDBK/FDBKB pins) eliminates static phase offset between reference and outputs

Applications

Ethernet Switch/Routing	PCI Express 3.0 System Clocking
Use Scenario: High-density 10GbE/25GbE switch fabric requiring synchronous timing across multiple SerDes lanes and management processors. IC Role / Device Role / Timing Role: Quad-output clock generator providing independent 156.25 MHz (XAUI), 125 MHz (PCIe), 100 MHz (management), and 25 MHz (RTC) clocks with sub-ps jitter alignment. Use Value: Eliminates need for multiple discrete oscillators; enables deterministic inter-lane skew control via programmable phase offsets on each output.	Use Scenario: Server motherboard with CPU, GPU, and NVMe controllers requiring compliant PCIe 3.0 reference clocks with tight jitter budgets. IC Role / Device Role / Timing Role: Supplies 100 MHz HCSL clocks to PCIe root complex and endpoints, meeting PCIe 3.0 RMS jitter limit of ≤0.45 ps. Use Value: Delivers 0.45 ps RMS jitter at 100 MHz (per Table 10), satisfies Intel Clock Jitter Tool validation requirements without external filtering.
Broadcast Video Timing	FPGA & Processor Clock Distribution
Use Scenario: SMPTE ST 2082 (12G-SDI) video processing platform needing precise 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks with frame-sync capability. IC Role / Device Role / Timing Role: Generates three synchronized video clocks plus a fourth auxiliary clock for genlock or audio sampling, all derived from single crystal. Use Value: Achieves <10 ps cycle-cycle jitter (Table 10) critical for minimizing video artifacts; supports phase alignment across outputs for multi-channel sync.	Use Scenario: Industrial FPGA-based motion controller integrating ARM Cortex-A9, DDR3 memory, and high-speed ADCs - each requiring distinct clock domains. IC Role / Device Role / Timing Role: Provides 50 MHz (ARM core), 200 MHz (DDR3 interface), 125 MHz (ADC sampling), and 10 MHz (real-time monitoring) from one IC. Use Value: Reduces board space vs. discrete oscillators; independent VDDO supplies allow direct interface to 1.5 V DDR3, 1.8 V FPGA I/O, and 3.3 V peripherals.

Ethernet Switch/Routing

PCI Express 3.0 System Clocking

Use Scenario: High-density 10GbE/25GbE switch fabric requiring synchronous timing across multiple SerDes lanes and management processors.

IC Role / Device Role / Timing Role: Quad-output clock generator providing independent 156.25 MHz (XAUI), 125 MHz (PCIe), 100 MHz (management), and 25 MHz (RTC) clocks with sub-ps jitter alignment.

Use Value: Eliminates need for multiple discrete oscillators; enables deterministic inter-lane skew control via programmable phase offsets on each output.

Use Scenario: Server motherboard with CPU, GPU, and NVMe controllers requiring compliant PCIe 3.0 reference clocks with tight jitter budgets.

IC Role / Device Role / Timing Role: Supplies 100 MHz HCSL clocks to PCIe root complex and endpoints, meeting PCIe 3.0 RMS jitter limit of ≤0.45 ps.

Use Value: Delivers 0.45 ps RMS jitter at 100 MHz (per Table 10), satisfies Intel Clock Jitter Tool validation requirements without external filtering.

Broadcast Video Timing

FPGA & Processor Clock Distribution

Use Scenario: SMPTE ST 2082 (12G-SDI) video processing platform needing precise 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks with frame-sync capability.

IC Role / Device Role / Timing Role: Generates three synchronized video clocks plus a fourth auxiliary clock for genlock or audio sampling, all derived from single crystal.

Use Value: Achieves <10 ps cycle-cycle jitter (Table 10) critical for minimizing video artifacts; supports phase alignment across outputs for multi-channel sync.

Use Scenario: Industrial FPGA-based motion controller integrating ARM Cortex-A9, DDR3 memory, and high-speed ADCs - each requiring distinct clock domains.

IC Role / Device Role / Timing Role: Provides 50 MHz (ARM core), 200 MHz (DDR3 interface), 125 MHz (ADC sampling), and 10 MHz (real-time monitoring) from one IC.

Use Value: Reduces board space vs. discrete oscillators; independent VDDO supplies allow direct interface to 1.5 V DDR3, 1.8 V FPGA I/O, and 3.3 V peripherals.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D08886-GM	8-output, higher integration; supports I2C reprogramming; lower jitter (0.5 ps RMS); larger 32-QFN package	Suitable for multi-chip synchronization and dynamic frequency changes; not pin-compatible	Select when >4 outputs or field reconfiguration is required; avoid if fixed pin-control and minimal footprint are mandatory
ICS8430I-01T	4-output, non-fractional synthesis; max 250 MHz output; 1.2 ps RMS jitter; 3.3 V only; no spread spectrum	Limited to fixed-ratio clock multiplication; no 1 ppm tuning or phase adjustment	Choose for cost-sensitive, low-jitter legacy designs where frequency flexibility is not needed

Compared with Si5332A-D08886-GM and ICS8430I-01T, SI5334M-B04346-GM uniquely balances pin-controlled simplicity, 0 ppm accuracy, 0.7 ps jitter, and 4-output flexibility in a 4×4 mm QFN - making it optimal for PCIe 3.0, 10GbE, and broadcast video where field programming is unnecessary but precision timing is critical.

Availability

SI5334M-B04346-GM is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe 3.0 host systems, and broadcast video timing applications requiring stable component supply, long-term lifecycle assurance, and guaranteed traceable sourcing.

Supply support for SI5334M-B04346-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure, automotive, and industrial markets.

The Si5334 family is engineered as a pin-configurable, low-jitter clock generator targeting high-speed serial interfaces (PCIe, Ethernet, Fibre Channel) and FPGA/processor clocking where deterministic phase alignment and zero ppm frequency error are essential.

FAQ

What is the maximum output frequency supported by SI5334M-B04346-GM?

SI5334M-B04346-GM supports up to 710 MHz on LVPECL/LVDS outputs under specific integer-related constraints (e.g., Fvco/4 or Fvco/6), while full any-frequency synthesis is guaranteed up to 350 MHz across all supported formats (LVPECL, LVDS, HCSL, CMOS, SSTL, HSTL). The 710 MHz capability applies only when MultiSynth outputs are configured at exact integer divisions of the VCO frequency.

Does SI5334M-B04346-GM require an external configuration EEPROM or I²C interface?

No. SI5334M-B04346-GM is factory-programmed with OTP NVM and operates autonomously at power-up - no external EEPROM, I²C bus, or firmware initialization is needed. Configuration is fully determined by pin strapping and internal one-time-programmable memory, aligning with its pin-controlled architecture.

Can SI5334M-B04346-GM generate different output voltages simultaneously?

Yes. SI5334M-B04346-GM provides four independent output buffer supply pins (VDDO0–VDDO3), each configurable for 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This allows simultaneous LVDS (2.5 V), HCSL (1.8 V), and CMOS (3.3 V) outputs - enabling direct interfacing with mixed-voltage SoCs, FPGAs, and PHYs without level shifters.

What is the purpose of the LOSLOL pin on SI5334M-B04346-GM?

The LOSLOL pin on SI5334M-B04346-GM is an open-drain alarm output that asserts low during loss-of-signal (detection latency 2.6–5 µs) or loss-of-lock (latency 5–10 ms). It serves as a hardware fault indicator for system monitoring and can be tied to a microcontroller interrupt or supervisor IC to trigger fail-safe responses.

Is SI5334M-B04346-GM compatible with PCIe 3.0 jitter specifications?

Yes. SI5334M-B04346-GM delivers 0.15–0.45 ps RMS jitter (10 kHz–50 MHz) for 100 MHz HCSL outputs - meeting and exceeding the PCIe 3.0 common-clock jitter requirement of ≤0.45 ps RMS. Validation uses the Intel Clock Jitter Tool v1.6.4 and complies with AN562 measurement methodology.

SI5334M-B04346-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5334M-B04346-GM FAQ

1.How can I place an order for SI5334M-B04346-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5334M-B04346-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5334M-B04346-GM reliable?

The price and inventory of SI5334M-B04346-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5334M-B04346-GM is usually 5 days.

3.What payment methods are accepted for SI5334M-B04346-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5334M-B04346-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5334M-B04346-GM?

SI5334M-B04346-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5334M-B04346-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5334M-B04346-GM?

For technical support, including SI5334M-B04346-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5334M-B04346-GM requirements.

6.How does Aetrix verify that SI5334M-B04346-GM is sourced from the original manufacturer or authorized distributors?

All SI5334M-B04346-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5334M-B04346-GM meets industry standards.

7.What is the process for return or replacement of SI5334M-B04346-GM?

All SI5334M-B04346-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5334M-B04346-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5334M-B04346-GM part is unused and in its original packaging.

Return procedure for SI5334M-B04346-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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