Skyworks Solutions Inc. SI5334M-B06024-GM
- Part No.:
- SI5334M-B06024-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Category:
- Application Specific Clock/Timing
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5334M-B06024-GM.pdf
- Description:
- 4-OUTPUT, ANY FREQUENCY(<200MHZ)
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5334M-B06024-GM from Skyworks Solutions is a pin-controlled, any-frequency quad clock generator IC with four independently configurable differential clock outputs. It synthesizes frequencies from 0.16 MHz to 710 MHz per output using MultiSynth fractional-N synthesis, delivers 0.7 ps RMS typical phase jitter, supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats, and operates from 1.8/2.5/3.3 V core and output supplies - deployed in PCIe 3.0 timing, FPGA clocking, and broadcast video systems.
For engineers reviewing the SI5334M-B06024-GM datasheet, SI5334M-B06024-GM pinout, SI5334M-B06024-GM application, or SI5334M-B06024-GM equivalent, key selection criteria include its 4-output independent frequency synthesis up to 710 MHz, zero-ppm accuracy, <20 ps phase step resolution, spread-spectrum capability on 100 MHz outputs, and 24-QFN package compatibility with high-density PCB layouts.
Technical Context
The SI5334M-B06024-GM integrates a fully on-chip fractional-N PLL with VCO, loop filter, and four independent MultiSynth output dividers enabling non-integer frequency synthesis on each of four differential outputs. Its input stage accepts 8–30 MHz crystals or 5–710 MHz differential/single-ended clocks, with R-divider options for reference scaling.
Each output driver features independent voltage supply (1.5/1.8/2.5/3.3 V), format selection (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), and programmable phase offset (±45 ns, <20 ps steps). The device operates in pin-control mode only - no I²C interface - and supports optional zero-delay feedback via FDBK/FDBKB pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count & type | 4 differential clock outputs (CLK0A/B through CLK3A/B), each independently configurable |
| Frequency range per output | 0.16–350 MHz (all formats); up to 710 MHz for LVPECL/LVDS with integer-related constraints |
| Phase jitter (RMS) | 0.7 ps typical (12 kHz–20 MHz), verified at 125 MHz output with 25 MHz crystal reference |
| Frequency accuracy | True 0 ppm error across all outputs due to fractional-N synthesis with no rounding drift |
| Core supply voltage | 1.8 V, 2.5 V, or 3.3 V - selectable per design; supports mixed-voltage system integration |
| Output supply per bank | VDDO0–VDDO3 independently settable to 1.5/1.8/2.5/3.3 V for mixed-signal interface compatibility |
| Package | 24-pin QFN, 4 mm × 4 mm, 0.5 mm pitch - optimized for thermal performance (θJA = 37 °C/W) and space-constrained routing |
Pinout & Package
SI5334M-B06024-GM is housed in a 24-lead, 4 mm × 4 mm QFN package with exposed thermal pad. Pin assignments follow Skyworks' standard Si5334 pinout: dual differential inputs (IN1/IN2, IN5/IN6), single-ended inputs (IN3, IN4), four differential output pairs (CLK0A/B–CLK3A/B), dedicated LOSLOL alarm output, OEB enable control, and separate VDD (core) and VDDOx (output buffer) supplies.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1 / IN2 | Differential reference input (primary) | Accepts 5–710 MHz AC-coupled differential clock; internal 100 Ω termination enabled |
| IN5 / IN6 | Differential reference input (secondary) | Redundant or alternate differential reference path; identical electrical specs to IN1/IN2 |
| IN3 / IN4 | Single-ended reference inputs | Support CMOS/SSTL/HSTL clocks (5–350 MHz); VIH/VIL thresholds scale with VDD |
| CLK0A / CLK0B – CLK3A / CLK3B | Differential clock outputs (4 pairs) | Each pair independently configured for format, frequency, voltage, and phase; LVPECL/LVDS/HCSL supported up to 710/350/250 MHz respectively |
| VDD | Core supply | 1.8/2.5/3.3 V ±10%; powers PLL, MultiSynth, control logic; IDD = 45 mA typ @ 100 MHz outputs |
| VDDO0–VDDO3 | Output buffer supplies (per bank) | Independent 1.5/1.8/2.5/3.3 V rails; define output swing and common-mode level per output pair |
| LOSLOL | Loss-of-signal/loss-of-lock alarm | Open-drain active-low output asserting within 5 µs of input failure or PLL unlock |
| OEB | Output enable/disable control | Active-low pin disabling all output drivers simultaneously; enables low-power standby mode |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth fractional-N synthesis | Enables any-frequency generation per output with zero ppm error and 0.7 ps RMS jitter - eliminates external VCXOs or multiple oscillators |
| Independent output configuration | Each of four differential outputs supports unique format (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), voltage (1.5–3.3 V), and frequency - simplifies multi-rail system clocking |
| Programmable phase offset | ±45 ns adjustment per output with <20 ps resolution - enables precise skew alignment across FPGAs, SerDes, or ADC/DAC sampling clocks |
| Spread-spectrum clocking (SSC) | PCIe 2.0-compliant SSC on any 100 MHz output - reduces EMI peak emissions without requiring host controller coordination |
| Zero-delay feedback mode | Optional external feedback via FDBK/FDBKB pins nullifies input-to-output phase delay - critical for deterministic latency in telecom line cards |
Applications
| PCI Express 3.0 Timing | FPGA & Processor Clocking |
|---|---|
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe 3.0 root ports and endpoints in a server motherboard. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four independent, low-jitter 100 MHz HCSL clocks with PCIe-compliant SSC on selected lanes. Use Value: Meets PCIe 3.0 total jitter spec (<33.6 ps pk-pk) while enabling per-lane SSC activation to pass EMI compliance without layout rework. |
Use Scenario: Supplying distinct clock domains (e.g., 156.25 MHz for transceivers, 100 MHz for AXI bus, 50 MHz for peripherals) to a Xilinx Kintex Ultrascale+ FPGA. IC Role / Device Role / Timing Role: Single-chip source of four precisely phased, format-matched clocks - eliminating discrete oscillators and reducing BOM count by 75%. Use Value: Independent phase offset control aligns setup/hold margins across clock domains; zero-ppm synthesis ensures long-term frequency stability under thermal drift. |
| Broadcast Video Timing | Telecom Line Cards |
Use Scenario: Generating SMPTE ST 204/292 compliant 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks for HD/4K video encoders and serializers. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact broadcast-standard frequencies from a single 27 MHz crystal reference. Use Value: Eliminates need for multiple fixed-frequency oscillators; MultiSynth achieves <0.1 ppm residual error - critical for genlock stability in OB vans. |
Use Scenario: Delivering OC-12 (155.52 MHz), SONET/SDH, and Ethernet (125 MHz) clocks to DSPs, PHYs, and framer ICs on a carrier-grade line card. IC Role / Device Role / Timing Role: Low-jitter (0.7 ps RMS) quad generator supporting zero-delay feedback mode for deterministic phase alignment between upstream/downstream timing paths. Use Value: Meets Telcordia GR-1244-CORE jitter requirements; LOSLOL alarm enables rapid fault isolation during network synchronization loss events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5332A-D06089-GM | Higher integration: 8 outputs, integrated EEPROM, I²C programmability; 0.5 ps RMS jitter; supports JESD204B deterministic latency | Required for designs needing >4 outputs, field reconfiguration, or sub-ns deterministic skew control | Select when flexibility, post-deployment tuning, or JESD204B compliance outweighs cost and footprint sensitivity |
| ICS8430I-01T | Fixed-frequency quad generator (no synthesis); 0.8 ps RMS jitter; 3.3 V only; no spread spectrum or phase control | Limited to static clock trees where all frequencies are known pre-production | Choose only for legacy designs locked to fixed frequencies and where pin control simplicity is prioritized over frequency agility |
Compared with Si5332A-D06089-GM, SI5334M-B06024-GM offers lower cost and smaller footprint but lacks I²C reprogrammability; versus ICS8430I-01T, it provides full any-frequency synthesis and phase control at marginally higher jitter - making it optimal for agile, multi-standard timing in next-gen infrastructure.
Availability
SI5334M-B06024-GM is available at Aetrix Electronics and suitable for PCIe 3.0 timing, FPGA clocking, and broadcast video applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for SI5334M-B06024-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog ICs for infrastructure, automotive, and mobile markets.
The Si5334 product line delivers pin-configurable, low-jitter clock generators for high-speed digital systems - designed specifically for applications demanding flexible, accurate, and deterministic timing in space-constrained environments.
FAQ
What input reference sources does the SI5334M-B06024-GM support?
The SI5334M-B06024-GM supports multiple reference inputs: an 8–30 MHz crystal directly connected to IN1/IN2, or AC-coupled differential clocks (5–710 MHz) on IN1/IN2 or IN5/IN6, or DC-coupled single-ended clocks (5–200 MHz CMOS, 5–350 MHz SSTL/HSTL) on IN3/IN4. All references feed the same on-chip PLL, and the device automatically selects based on pin strapping or factory programming.
Does the SI5334M-B06024-GM require external configuration after power-up?
No. The SI5334M-B06024-GM is factory-programmed with a fixed configuration stored in one-time-programmable (OTP) memory. Upon power-up, it begins operation immediately in the predefined state - no I²C communication, software initialization, or external configuration is needed. This makes SI5334M-B06024-GM ideal for secure, boot-critical timing applications.
Can all four outputs of the SI5334M-B06024-GM run at different frequencies simultaneously?
Yes. Each of the four differential output pairs (CLK0A/B through CLK3A/B) is independently configurable for frequency, format, voltage, and phase. The SI5334M-B06024-GM uses four dedicated MultiSynth dividers to synthesize any frequency up to 350 MHz (or select frequencies to 710 MHz) per output - enabling true multi-frequency clock trees from a single IC.
What is the maximum output frequency supported by the SI5334M-B06024-GM in LVDS mode?
The SI5334M-B06024-GM supports LVDS outputs up to 350 MHz across the full operating temperature range (–40 to +85 °C). At higher frequencies (367–710 MHz), LVPECL is the only supported differential format - confirmed in Table 4 of the datasheet. Output drive strength and jitter remain within spec at 350 MHz LVDS with proper 100 Ω termination.
How does the SI5334M-B06024-GM handle loss-of-signal detection?
The SI5334M-B06024-GM monitors all input references and asserts the open-drain LOSLOL pin within 2.6–5 µs of signal loss on any active input. This alarm is latched until power cycle or reset, and can be used to trigger system-level failover or diagnostic logging. The SI5334M-B06024-GM also detects PLL loss-of-lock independently, with deassertion occurring within 0.01–1 µs after signal recovery.
SI5334M-B06024-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- -
- Main Purpose:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5334M-B06024-GM FAQ
1.How can I place an order for SI5334M-B06024-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5334M-B06024-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5334M-B06024-GM reliable?
The price and inventory of SI5334M-B06024-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5334M-B06024-GM is usually 5 days.
3.What payment methods are accepted for SI5334M-B06024-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5334M-B06024-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5334M-B06024-GM?
SI5334M-B06024-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5334M-B06024-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5334M-B06024-GM?
For technical support, including SI5334M-B06024-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5334M-B06024-GM requirements.
6.How does Aetrix verify that SI5334M-B06024-GM is sourced from the original manufacturer or authorized distributors?
All SI5334M-B06024-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5334M-B06024-GM meets industry standards.
7.What is the process for return or replacement of SI5334M-B06024-GM?
All SI5334M-B06024-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5334M-B06024-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5334M-B06024-GM part is unused and in its original packaging.
Return procedure for SI5334M-B06024-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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