Skyworks Solutions Inc. SI5335A-B02062-GM
- Part No.:
- SI5335A-B02062-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
SI5335A-B02062-GM.pdf
- Description:
- IC 4 OUT ANY FREQ <350MHZ 24QFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,048
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Product details
Overview
SI5335A-B02062-GM from Skyworks Solutions is a web-customizable, quad-output clock generator/buffer IC supporting four independent non-integer-related frequencies up to 350 MHz. It features MultiSynth fractional divider technology with 0 ppm synthesis error, PCIe Gen 1–4 common clock compliance, and dual selectable PLL loop bandwidths (1.6 MHz / 475 kHz). It serves as a single-device replacement for multiple crystal oscillators and clock ICs in high-speed serial interface timing systems.
For engineers reviewing the SI5335A-B02062-GM datasheet, SI5335A-B02062-GM pinout, SI5335A-B02062-GM application, or SI5335A-B02062-GM equivalent, key selection considerations include differential output format support (LVPECL/LVDS/HCSL/CML), per-output voltage configurability (1.5/1.8/2.5/3.3 V), loss-of-signal alarm, and pin-selectable frequency plans for multi-configuration system flexibility.
Technical Context
The SI5335A-B02062-GM implements a single high-performance PLL with patented MultiSynth fractional-N synthesis across four independent output banks. Each bank supports either one differential pair or two single-ended outputs, with full format and voltage configurability per driver. Input flexibility includes external crystal (25/27 MHz), CMOS (10–200 MHz), SSTL/HSTL (10–350 MHz), or differential (10–350 MHz) references.
It supports both clock generator mode (PLL active, 45 mA core current) and low-power clock buffer mode (PLL bypass, 12 mA core current), with programmable control pins (P1–P6) enabling spread spectrum enable, master/output enables, frequency plan selection (FS1/FS0), and reset. Loss-of-signal detection activates within 2.6–5 µs on CLKIN failure.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count & type | 4 banks: each supports 1 differential pair or 2 single-ended outputs; total up to 4 diff / 8 SE clocks |
| Max output frequency | 350 MHz (LVPECL/LVDS/CML); 250 MHz (HCSL); 200 MHz (CMOS) |
| Phase jitter (RMS) | 0.7 ps RMS (12 kHz–20 MHz, 1.6 MHz loop BW, LVDS/HCSL/LVPECL/CML) |
| PLL loop bandwidth | Selectable 1.6 MHz (PCIe jitter attenuation) or 475 kHz (DSL jitter attenuation) |
| Supply voltages | Core: 1.8/2.5/3.3 V; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V |
| Operating temperature | –40 °C to +85 °C, suitable for industrial and telecom line card environments |
| Package | 24-pin QFN, 4 mm × 4 mm, 0.5 mm pitch, exposed thermal pad |
Pinout & Package
The SI5335A-B02062-GM is housed in a 24-lead QFN package (4 mm × 4 mm) with an exposed thermal pad. Pin assignments are fixed per the Skyworks Si5335 family layout and validated for this variant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 (XA/CLKIN, XB/CLKINB) | Differential reference input | Accepts AC-coupled LVDS/LVPECL/HCSL/CML (10–350 MHz); internal 10 kΩ termination |
| 3, 4 (CLK0A, CLK0B) | Bank 0 differential output | Configurable format/voltage; supports LVPECL/LVDS/HCSL/CML/CMOS/SSTL/HSTL |
| 5–7 (VDDO0, CLK1A, CLK1B) | Bank 1 power & differential output | VDDO0 sets voltage for CLK1A/B drivers; independent of other VDDO rails |
| 8 (LOS) | Loss-of-signal alarm output | Open-drain active-low signal asserting within 5 µs of CLKIN failure |
| 9–11 (VDD, VDD, P1) | Core supply & multifunction control | P1 configurable as OEB_all, SSENB, FS1, FS0, or RESET per ClockBuilder Pro configuration |
| 12–14 (CLK2A, CLK2B, VDDO1) | Bank 2 differential output & supply | VDDO1 powers CLK2A/B; format/voltage set independently per bank |
| 15–17 (P2, P3, CLK3A) | Control pins & Bank 3 output | P2/P3 support OEB0–OEB3, frequency plan select, or reset; CLK3A pairs with CLK3B (Pin 18) |
| 18–24 (CLK3B, VDDO2, VDDO3, GND, GND, RSVD_GND, Pad) | Bank 3 output, supplies, ground, thermal pad | VDDO2/VDDO3 power Banks 2/3; RSVD_GND is reserved ground; Pad = exposed thermal pad (GND) |
Key Features
| Feature | Design Value |
|---|---|
| MultiSynth fractional-N synthesis | Enables any-frequency output generation (1–350 MHz) with 0 ppm frequency error across all four banks |
| Three pin-selectable configurations | One device replaces three discrete clock generators via FS1/FS0 control pins and P1–P3 assignment |
| Per-output voltage and format control | Each of four output banks supports independent VDDO (1.5/1.8/2.5/3.3 V) and logic format (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) |
| PCIe Gen 1–4 common clock compliance | Meets jitter requirements (e.g., ≤0.45 ps RMS for PCIe Gen 3/4) using 1.6 MHz loop bandwidth and HCSL outputs |
| Loss-of-signal detection | Monitors CLKIN continuously; asserts LOS pin within 5 µs of signal loss to trigger system failover or alert |
| Web-based customization (ClockBuilder Pro) | Factory-programmed configuration delivered in ≤2 weeks with no MOQ; eliminates custom mask costs and long lead times |
Applications
| PCI Express Timing | Ethernet Switch Clocking |
|---|---|
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 3/4 endpoints and root complexes in server backplanes. IC Role / Device Role / Timing Role: Quad-output common clock generator with PCIe-compliant jitter performance and spread spectrum control. Use Value: Replaces four discrete oscillators; meets PCIe Gen 4 TJ < 33.6 ps pk-pk and RMS jitter ≤0.45 ps with 1.6 MHz loop bandwidth. | Use Scenario: Generating 125 MHz, 250 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs, MACs, and SerDes in enterprise switches. IC Role / Device Role / Timing Role: Any-frequency clock synthesizer with independent output banks driving mixed-voltage interfaces. Use Value: Delivers sub-1 ps RMS jitter at 125 MHz (LVDS) and supports 1.8 V/2.5 V/3.3 V I/O domains simultaneously. |
| Broadcast Video Timing | Telecom Line Card Synchronization |
Use Scenario: Supplying frame-synchronized 27 MHz, 74.25 MHz, and 148.5 MHz clocks to SDI transceivers, video processors, and FPGA-based scalers. IC Role / Device Role / Timing Role: Multi-format clock generator with precise frequency synthesis for SMPTE ST 292/424 compliance. Use Value: Achieves 0 ppm synthesis error across all outputs; supports HCSL and LVDS formats required by broadcast SoCs. | Use Scenario: Distributing 155.52 MHz (OC-3), 622.08 MHz (OC-12), and 2.488 GHz (OC-48) derived clocks across DSPs, FPGAs, and framer ICs in optical line cards. IC Role / Device Role / Timing Role: Jitter-attenuating clock buffer/generator with dual loop bandwidth for SONET/SDH and SyncE applications. Use Value: Meets OC-12 random jitter ≤1 ps RMS at 155.52 MHz using 475 kHz loop bandwidth for legacy telecom filtering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5345A-D06189-GM | Higher integration: 8 outputs, integrated jitter cleaner, wider frequency range (up to 1.2 GHz), supports JESD204B deterministic latency | Targeted at high-end data converters and 5G wireless infrastructure requiring ultra-low jitter (< 80 fs RMS) and deterministic delay | Select when >4 outputs, sub-100 fs jitter, or JESD204B synchronization are required; not drop-in compatible due to pin count and feature set |
| ICS8430I-01LG | Fixed-function 4-output LVDS clock generator; no fractional synthesis, no web customization, max 250 MHz output, single 3.3 V supply | Suitable for cost-sensitive, static-clocking applications where frequency flexibility and multi-voltage support are unnecessary | Choose for simple, low-cost replacement of legacy clock trees without reconfiguration needs; lacks PCIe Gen 4 compliance and MultiSynth flexibility |
Compared with SI5335A-B02062-GM, the Si5345A-D06189-GM adds jitter cleaning and higher output count but requires board redesign, while the ICS8430I-01LG offers lower cost and simpler layout at the expense of frequency agility, voltage flexibility, and PCIe Gen 4 readiness.
Availability
SI5335A-B02062-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 timing, 10 GbE switch clocking, and broadcast video synchronization requiring stable component supply, factory-programmed configuration, and long-term lifecycle support.
Supply support for SI5335A-B02062-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.
The Si5335 product line delivers highly configurable, web-customizable clock generators targeting high-speed serial interface timing in servers, networking equipment, and telecom infrastructure where multi-frequency synthesis and PCIe compliance are critical.
FAQ
What is the primary function of the SI5335A-B02062-GM in a PCIe Gen 4 system?
The SI5335A-B02062-GM serves as a common clock generator delivering four low-jitter reference clocks (e.g., 100 MHz) compliant with PCIe Gen 4 specifications. It achieves ≤0.45 ps RMS jitter using its 1.6 MHz PLL loop bandwidth and HCSL output format, meeting the Base Specification 4.0 rev. 0.5 requirements without requiring external jitter cleaners. The SI5335A-B02062-GM also supports spread spectrum to reduce EMI in dense server backplanes.
Does the SI5335A-B02062-GM support both clock generator and clock buffer modes?
Yes, the SI5335A-B02062-GM operates in two distinct modes: clock generator mode (PLL active, 45 mA core current, full frequency synthesis) and clock buffer mode (PLL bypass, 12 mA core current, direct input-to-output path with 2.5–4 ns propagation delay). Mode selection is controlled via ClockBuilder Pro configuration and does not require external hardware changes. The SI5335A-B02062-GM maintains loss-of-signal detection and output enable functionality in both modes.
How many independent output voltage rails does the SI5335A-B02062-GM support?
The SI5335A-B02062-GM supports four independent output buffer supply rails: VDDO0, VDDO1, VDDO2, and VDDO3. Each rail powers one output bank and can be set to 1.5 V, 1.8 V, 2.5 V, or 3.3 V independently. This allows simultaneous interfacing with mixed-voltage components-such as 1.8 V FPGAs, 2.5 V SerDes, and 3.3 V legacy peripherals-without level shifters. The SI5335A-B02062-GM's per-bank voltage control is configured during ClockBuilder Pro programming and locked at power-up.
Can the SI5335A-B02062-GM generate non-integer-related output frequencies?
Yes, the SI5335A-B02062-GM uses Skyworks' patented MultiSynth fractional-N divider technology to synthesize four completely independent, non-integer-related output frequencies-from 1 MHz up to 350 MHz-with zero ppm frequency error. Unlike integer-N synthesizers, it avoids spurs and phase buildup, enabling clean clocking of heterogeneous subsystems (e.g., 100 MHz PCIe, 125 MHz Ethernet, 27 MHz video, 74.25 MHz SDI) from a single 25 MHz crystal. This capability is intrinsic to the SI5335A-B02062-GM architecture and verified across all production units.
What packaging and thermal characteristics apply to the SI5335A-B02062-GM?
The SI5335A-B02062-GM is packaged in a 24-pin QFN (4 mm × 4 mm, 0.5 mm pitch) with an exposed thermal pad connected to GND. Its thermal resistance θJA is 42 °C/W (JEDEC standard PCB), enabling operation from –40 °C to +85 °C ambient without forced airflow. The package supports standard reflow profiles and requires a 6×6 mm thermal land pattern per Skyworks AN937. The SI5335A-B02062-GM's low 45 mA core current in generator mode minimizes self-heating under full load.
SI5335A-B02062-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- MultiSynth™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-QFN (4x4)
SI5335A-B02062-GM FAQ
1.How can I place an order for SI5335A-B02062-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5335A-B02062-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5335A-B02062-GM reliable?
The price and inventory of SI5335A-B02062-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5335A-B02062-GM is usually 5 days.
3.What payment methods are accepted for SI5335A-B02062-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5335A-B02062-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5335A-B02062-GM?
SI5335A-B02062-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5335A-B02062-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5335A-B02062-GM?
For technical support, including SI5335A-B02062-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5335A-B02062-GM requirements.
6.How does Aetrix verify that SI5335A-B02062-GM is sourced from the original manufacturer or authorized distributors?
All SI5335A-B02062-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5335A-B02062-GM meets industry standards.
7.What is the process for return or replacement of SI5335A-B02062-GM?
All SI5335A-B02062-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5335A-B02062-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5335A-B02062-GM part is unused and in its original packaging.
Return procedure for SI5335A-B02062-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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