Skyworks Solutions Inc. SI5335A-B04402-GMR

Overview

SI5335A-B04402-GMR from Skyworks Solutions is a web-customizable, quad-output clock generator/buffer IC with MultiSynth fractional synthesis, delivering four independent non-integer-related frequencies up to 350 MHz, 0.7 ps RMS phase jitter, PCIe Gen 1–4 common clock compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL outputs in a 4×4 mm 24-QFN package. It serves as a single-device replacement for multiple oscillators and clock ICs in high-speed serial interface timing systems.

For engineers reviewing the SI5335A-B04402-GMR datasheet, SI5335A-B04402-GMR pinout, SI5335A-B04402-GMR application, or SI5335A-B04402-GMR equivalent, this page provides verified technical context, exact pin functions, PCIe- and DSL-optimized jitter performance, output format flexibility per bank, and factory-programmed configuration details confirmed for this specific variant.

Technical Context

The SI5335A-B04402-GMR implements a single PLL with two selectable loop bandwidths (1.6 MHz or 475 kHz) and four independent MultiSynth fractional dividers - one per output bank - enabling simultaneous synthesis of unrelated frequencies with 0 ppm frequency error. Input reference options include 25/27 MHz crystal, or AC-coupled CMOS/SSTL/HSTL/differential signals from 10–350 MHz.

Each of its four output banks supports either one differential pair (LVPECL/LVDS/CML/HCSL) or two single-ended outputs (CMOS/SSTL/HSTL), with independent VDDO supply selection (1.5/1.8/2.5/3.3 V) and programmable pin functions including SSENB, FS[1:0], RESET, and OEB per bank. Loss-of-signal detection and PCIe SRNS compliance are hardware-verified features.

Key Specifications

Pinout & Package

SI5335A-B04402-GMR uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad (GND). Pin functions are defined per Skyworks Rev. 1.4 datasheet, with five multi-function control pins (P1–P3, P5, P6) supporting frequency plan selection, spread spectrum enable, reset, and output enables.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with Si5345A-D06802-GM and ICS8430I-01T, the SI5335A-B04402-GMR uniquely balances web-customizable any-frequency synthesis, PCIe Gen 4 jitter performance, and compact 24-QFN packaging - making it optimal for space-constrained, multi-protocol timing in networking and compute platforms where field reconfiguration is valuable.

Availability

SI5335A-B04402-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch designs, 10GbE router timing, and FPGA-based broadcast video systems requiring stable component supply, factory-programmed configuration, and long-term lifecycle support.

Supply support for SI5335A-B04402-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The SI5335 family is designed as a highly flexible, web-configurable clock generator/buffer platform targeting high-speed serial interface timing - especially PCIe, Ethernet, and broadcast video - where low jitter, multi-format outputs, and field-upgradable configurations are critical.

FAQ

What is the factory-programmed configuration of SI5335A-B04402-GMR?

The SI5335A-B04402-GMR is pre-programmed by Skyworks using ClockBuilder Pro to deliver four specific output frequencies and formats optimized for PCIe Gen 4 common clock applications. Its configuration includes 100 MHz HCSL outputs on CLK0A/B and CLK1A/B, 125 MHz LVDS on CLK2A/B, and 156.25 MHz LVDS on CLK3A/B - all derived from a 25 MHz crystal input with 1.6 MHz PLL bandwidth and enabled spread spectrum.

Does SI5335A-B04402-GMR support crystal input directly?

Yes, SI5335A-B04402-GMR supports direct connection of a 25 MHz or 27 MHz fundamental-mode crystal to pins 1 (XA/CLKIN) and 2 (XB/CLKINB). The device integrates 18 pF load capacitance and automatic crystal drive level control, eliminating external capacitors and simplifying board design versus discrete oscillator solutions.

Can SI5335A-B04402-GMR operate in clock buffer mode?

Yes, SI5335A-B04402-GMR supports PLL bypass (buffer) mode, where input clock is distributed directly to outputs with minimal added jitter (2.5–4 ns propagation delay). In this mode, core current drops to 12 mA at 1.8 V, and input frequency range extends down to 1 MHz - though loss-of-signal detection is disabled below 5 MHz.

What output voltage options does SI5335A-B04402-GMR support per bank?

SI5335A-B04402-GMR supports independent VDDO supply selection per output bank: 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This allows simultaneous generation of HCSL (1.8 V), LVDS (2.5 V), and CMOS (3.3 V) outputs from a single device - essential for interfacing with mixed-voltage FPGA I/O banks and ASIC timing domains.

Is SI5335A-B04402-GMR qualified for industrial temperature operation?

Yes, SI5335A-B04402-GMR is specified and tested for full functionality across –40 °C to +85 °C ambient temperature. Its guaranteed electrical performance - including 0.7 ps RMS phase jitter, 45 mA max core current, and 100 ps output skew - applies across this entire industrial temperature range per Skyworks Rev. 1.4 datasheet.