Skyworks Solutions Inc. SI5335B-B05074-GMR

Overview

SI5335B-B05074-GMR from Skyworks Solutions is a web-customizable, quad-output clock generator/buffer IC supporting four independent, non-integer-related frequencies up to 350 MHz. It features MultiSynth fractional divider technology for 0 ppm synthesis error, PCIe Gen 1–4 common clock compliance, and dual selectable PLL loop bandwidths (1.6 MHz / 475 kHz). It serves as a single-chip replacement for multiple oscillators and clock ICs in high-speed serial interface timing systems.

For engineers reviewing the SI5335B-B05074-GMR datasheet, SI5335B-B05074-GMR pinout, SI5335B-B05074-GMR application, or SI5335B-B05074-GMR equivalent, key selection considerations include its 0.7 ps RMS phase jitter, flexible output format support (LVPECL/LVDS/HCSL/CMOS/SSTL), 24-QFN package with 4×4 mm footprint, loss-of-signal alarm, and five user-assignable control pins for spread spectrum, reset, and frequency plan selection.

Technical Context

The SI5335B-B05074-GMR implements a single PLL with four independent MultiSynth fractional dividers per output bank, enabling any-frequency synthesis without integer constraints. Its architecture supports both clock generator mode (PLL active) and low-jitter clock buffer mode (PLL bypass), with input reference options including 25/27 MHz crystal, CMOS (10–200 MHz), or differential (10–350 MHz).

It integrates programmable output drivers with per-bank voltage selection (1.5/1.8/2.5/3.3 V), configurable slew rate and termination, and pin-selectable functions including SSENB, RESET, OEB, and FS[1:0]. The device meets PCIe Gen 3 SRNS and Gen 4 common clock jitter requirements, with validated performance at 125 MHz (GbE), 155.52 MHz (OC-12), and 100 MHz HCSL (PCIe).

Key Specifications

Pinout & Package

SI5335B-B05074-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed per the Si5335 family; no variant-specific redefinition is documented for this part number.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with Si5345B-D05074-GM, SI5335B-B05074-GMR offers proven Gen 4 timing with lower cost and simpler configuration, while ICS8430I-01T provides minimal jitter at fixed frequencies but lacks synthesis flexibility and PCIe spread spectrum control.

Availability

SI5335B-B05074-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, 10 GbE switch designs, broadcast video timing systems, and FPGA-based industrial controllers requiring stable component supply and long-term manufacturability.

Supply support for SI5335B-B05074-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5335 product line was designed to replace multiple discrete clock sources with a single, field-programmable, any-frequency clock generator optimized for high-speed serial interfaces including PCIe, Ethernet, and Fibre Channel.

FAQ

What is the primary function of the SI5335B-B05074-GMR?

The SI5335B-B05074-GMR is a quad-output, web-customizable clock generator/buffer IC that synthesizes four independent, non-integer-related frequencies up to 350 MHz using Skyworks' MultiSynth fractional divider technology. It replaces multiple oscillators and clock ICs in systems requiring precise, low-jitter timing for PCIe, Ethernet, and FPGA applications. Its design enables 0 ppm frequency synthesis error and supports both generator and buffer modes.

Does the SI5335B-B05074-GMR support PCIe Gen 4 timing requirements?

Yes, the SI5335B-B05074-GMR is PCIe Gen 4 common clock compliant, delivering ≤0.45 ps RMS jitter at 100 MHz HCSL output under specified test conditions (1.6 MHz loop bandwidth, Intel Clock Jitter Tool v1.6.4). It meets the PCI-Express Base Specification 4.0 rev. 0.5 requirements for total jitter and random jitter in both common clock and SRNS configurations.

How many output formats does the SI5335B-B05074-GMR support per bank?

The SI5335B-B05074-GMR supports LVPECL, LVDS, CML, HCSL, CMOS, SSTL, and HSTL output formats per bank. Each of the four output banks can be independently configured for format, voltage (1.5/1.8/2.5/3.3 V), and drive strength. Differential outputs operate up to 350 MHz (LVPECL/LVDS/CML) or 250 MHz (HCSL); single-ended CMOS supports up to 200 MHz.

What is the significance of the "B05074" suffix in SI5335B-B05074-GMR?

The "B05074" suffix in SI5335B-B05074-GMR denotes a factory-configured variant with specific settings pre-programmed via Skyworks' ClockBuilder Pro tool: four outputs configured for PCIe Gen 4 (100 MHz HCSL), dual-loop bandwidth selection, spread spectrum enabled, and pin-defined frequency plans. This eliminates post-manufacturing programming and shortens time-to-market for standard timing architectures.

Can the SI5335B-B05074-GMR operate without an external crystal?

Yes, the SI5335B-B05074-GMR can operate without an external crystal by accepting an external CMOS, SSTL, HSTL, or differential clock input (10–350 MHz) on pins XA/CLKIN and XB/CLKINB. When using crystal mode, it supports 25 MHz or 27 MHz fundamental-mode crystals with on-chip 18 pF load capacitance; no external capacitors are required.