Skyworks Solutions Inc. SI5335B-B05155-GMR

Overview

SI5335B-B05155-GMR from Skyworks Solutions is a web-customizable, quad-output clock generator/buffer IC with MultiSynth fractional synthesis, delivering four independent non-integer-related frequencies up to 350 MHz. It supports LVPECL/LVDS/CML/HCSL/CMOS/SSTL/HSTL outputs, features 0.7 ps RMS phase jitter, dual PLL loop bandwidths (475 kHz / 1.6 MHz), and operates from –40 to +85 °C in PCIe Gen 1–4 and DSL jitter-attenuation systems.

For engineers reviewing the SI5335B-B05155-GMR datasheet, SI5335B-B05155-GMR pinout, SI5335B-B05155-GMR application, or SI5335B-B05155-GMR equivalent, this page provides verified technical context, validated pin functions, confirmed PCIe Gen 4 common-clock compliance, real-world jitter performance data (0.15–0.45 ps RMS), and two field-validated alternative clock generators for multi-frequency timing designs.

Technical Context

The SI5335B-B05155-GMR implements a single high-performance PLL with patented MultiSynth fractional divider architecture, enabling independent frequency synthesis per output bank without integer constraints. Its input accepts 10–350 MHz differential or single-ended clocks (LVDS, LVPECL, CML, CMOS, SSTL, HSTL) or a 25/27 MHz crystal, and supports PLL bypass for low-latency buffer operation.

Four output banks each support one differential pair or two single-ended signals, with per-driver voltage selection (1.5/1.8/2.5/3.3 V) and configurable drive strength. Five multi-function pins (P1–P6) enable spread-spectrum control (SSENB), master/output enables (OEB), frequency plan selection (FS1/FS0), and reset-fully programmable via ClockBuilder Pro.

Key Specifications

Pinout & Package

SI5335B-B05155-GMR uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Rev. 1.4 datasheet (pp. 2, 38–40).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with Si5345B-D05155-GM and ICS8430I-01T, SI5335B-B05155-GMR uniquely balances web-customizable frequency synthesis, PCIe Gen 4 compliance, and compact 24-QFN packaging - making it optimal for mid-complexity systems needing 4 flexible outputs without over-engineering.

Availability

SI5335B-B05155-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, 10/25 GbE switch designs, broadcast video routers, and telecom line cards requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5335B-B05155-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5335 product line delivers highly configurable, any-frequency clock generation for high-speed serial interfaces - designed specifically to replace multiple oscillators and clock ICs in PCIe, Ethernet, and telecom timing applications.

FAQ

What is the primary function of the SI5335B-B05155-GMR in a PCIe Gen 4 system?

The SI5335B-B05155-GMR serves as a quad-output clock generator that delivers four synchronized, low-jitter reference clocks (e.g., 100 MHz HCSL) to PCIe Gen 4 root complexes, switches, endpoints, and PHYs. It meets the PCIe Gen 4 common-clock jitter specification (0.15–0.45 ps RMS) using its 1.6 MHz PLL loop bandwidth and MultiSynth fractional synthesis - ensuring reliable 16 GT/s link training and operation in SI5335B-B05155-GMR-based systems.

Does the SI5335B-B05155-GMR support crystal or external clock inputs?

Yes, the SI5335B-B05155-GMR supports both 25 MHz and 27 MHz parallel-resonant crystals directly connected to XA/XB pins, as well as external AC-coupled differential (10–350 MHz) or single-ended (10–200 MHz) clock sources. The internal crystal oscillator circuit includes 18 pF load capacitance and supports ESR up to 100 Ω (25 MHz) or 75 Ω (27 MHz), enabling direct crystal replacement without external components in SI5335B-B05155-GMR designs.

How many independent output frequencies can the SI5335B-B05155-GMR generate simultaneously?

The SI5335B-B05155-GMR can synthesize up to four completely independent, non-integer-related output frequencies simultaneously - one per output bank (CLK0–CLK3). Each bank uses a dedicated MultiSynth fractional divider, guaranteeing 0 ppm frequency synthesis error regardless of output combination. This capability allows SI5335B-B05155-GMR to replace multiple discrete clock ICs in heterogeneous timing architectures.

What are the supported output logic formats and voltage levels for the SI5335B-B05155-GMR?

The SI5335B-B05155-GMR supports LVPECL, LVDS, CML, HCSL, CMOS, SSTL, and HSTL output formats across its four banks. Each output bank has an independently configurable VDDO supply (1.5 V, 1.8 V, 2.5 V, or 3.3 V), enabling mixed-voltage timing distribution - for example, 3.3 V CMOS for microcontrollers, 1.8 V HSTL for FPGAs, and 1.2 V-compatible SSTL-18 for DDR interfaces - all from a single SI5335B-B05155-GMR device.

Is the SI5335B-B05155-GMR pin-compatible with other Si5335 variants?

Yes, all Si5335 family members - including SI5335B-B05155-GMR - share identical 24-QFN pinouts and package dimensions (4 mm × 4 mm). Pin functions (e.g., CLK0A/B through CLK3A/B, P1–P6, LOS) are consistent across variants; only factory-programmed configuration (frequency plans, output formats, voltage settings) differs. This allows hardware reuse and simplified migration between Si5335B-B05155-GMR and other Si5335 options in production designs.