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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5335B-B05215-GMR

Name: SI5335B-B05215-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5335B-B05215-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5335B-B05215-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5335B-B05215-GMR.pdf

Description:: IC 4OUT ANY FREQ <200MHZ 24QFN

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Product details

Overview

SI5335B-B05215-GMR from Skyworks Solutions is a web-customizable, quad-output clock generator/buffer IC with MultiSynth fractional synthesis, delivering four independent non-integer-related frequencies up to 350 MHz, 0.7 ps RMS phase jitter, PCIe Gen 1–4 common clock compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL outputs in telecom and high-speed serial applications.

For engineers reviewing the SI5335B-B05215-GMR datasheet, SI5335B-B05215-GMR pinout, SI5335B-B05215-GMR application, or SI5335B-B05215-GMR equivalent, this device enables single-chip replacement of multiple oscillators and clock ICs in PCIe, Ethernet, and FPGA timing systems while supporting factory-configured pin-controlled frequency plans and spread-spectrum control.

Technical Context

The SI5335B-B05215-GMR integrates a high-performance PLL with two selectable loop bandwidths (1.6 MHz or 475 kHz) for jitter attenuation in PCIe or DSL applications, and four independent MultiSynth fractional dividers-each driving one differential pair or two single-ended outputs. It accepts flexible input references including 25/27 MHz crystals, CMOS (10–200 MHz), or differential signals (10–350 MHz).

All outputs are independently configurable for format (LVPECL/LVDS/CML/HCSL/CMOS/SSTL/HSTL), voltage (1.5/1.8/2.5/3.3 V), and enable control, with five user-assignable multi-function pins (SSENB, RESET, FS[1:0], OEB per bank) and loss-of-signal detection on the reference input.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Count & Type	4 banks: each supports 1 differential pair or 2 single-ended outputs (up to 4 diff / 8 SE)
Max Output Frequency	350 MHz (LVPECL/LVDS/CML/SSTL/HSTL); 250 MHz (HCSL); 200 MHz (CMOS)
Phase Jitter (RMS)	0.7 ps (12 kHz–20 MHz, 1.6 MHz loop BW, differential outputs)
Input Reference Options	25/27 MHz crystal; CMOS (10–200 MHz); SSTL/HSTL (10–350 MHz); differential (10–350 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently settable 1.5/1.8/2.5/3.3 V
Operating Temperature	–40 °C to +85 °C, qualified for industrial embedded and telecom line card use
Package	24-pin QFN, 4 mm × 4 mm, exposed pad, RoHS-compliant

Pinout & Package

SI5335B-B05215-GMR is housed in a 24-lead QFN package (4 mm × 4 mm) with an exposed thermal pad. Pin assignments follow Skyworks' standard Si5335 pinout, including dual differential inputs (XA/CLKIN, XB/CLKINB), four output banks (CLK0A/B through CLK3A/B), three multi-function pins (P1, P2, P3), two additional configurable pins (P5, P6), LOS alarm output, and dedicated VDDOx supplies per bank.

Pin/Terminal	Circuit Role	Design Meaning
XA/CLKIN, XB/CLKINB (Pins 1, 2)	Differential reference input	Accepts AC-coupled LVDS/LVPECL/HCSL/CML clocks (10–350 MHz) or crystal; enables loss-of-signal detection
CLK0A/CLK0B to CLK3A/CLK3B (Pins 6–7, 9–10, 13–14, 17–18)	Differential clock outputs	Four independent banks; each configurable for LVPECL/LVDS/CML/HCSL with per-bank VDDO supply
VDDO0–VDDO3 (Pins 12, 8, 11, 21)	Output buffer supply rails	Independent 1.5/1.8/2.5/3.3 V selection per bank enables mixed-voltage system interfacing
P1, P2, P3, P5, P6 (Pins 15, 16, 19, 20, 22)	Multi-function control inputs	Configurable as SSENB (spread spectrum), RESET, FS[1:0] (frequency plan select), or OEB (output enable)
LOS (Pin 8)	Loss-of-signal indicator	Open-drain output asserts low within 5 µs of reference failure; supports system fault monitoring

Key Features

Feature	Design Value
MultiSynth fractional synthesis	Enables any-frequency generation up to 350 MHz with 0 ppm synthesis error across all four outputs
Three pin-selectable configurations	Allows one device to replace three discrete clock generators via hardware-selectable frequency plans
PCIe Gen 1–4 common clock compliance	Meets jitter requirements (e.g., ≤0.45 ps RMS for PCIe Gen 3/4) without external filtering or reclocking
Flexible output stage architecture	Per-bank voltage control and format selection (LVPECL/LVDS/HCSL/CMOS/SSTL) simplifies interface to mixed-logic FPGAs and ASICs
Low-power operation	45 mA core current in clock generator mode; 12 mA in buffer-only (PLL bypass) mode

Applications

PCI Express Timing	Ethernet Switch Clocking
Use Scenario: Providing synchronized reference clocks to PCIe root complex and endpoint devices in servers and accelerators. IC Role / Device Role / Timing Role: Quad-output clock generator delivering 100 MHz HCSL and 125 MHz LVDS clocks with PCIe Gen 3/4-compliant jitter. Use Value: Eliminates need for multiple oscillators and reduces board space while meeting strict PCIe SRNS and common clock jitter specs.	Use Scenario: Generating precise 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and switch fabric interfaces. IC Role / Device Role / Timing Role: Configurable clock buffer/generator supporting LVDS and CMOS outputs at mixed frequencies for multi-rate Ethernet silicon. Use Value: Enables single-device timing for multi-port switches with independent frequency scaling and low-jitter distribution.
FPGA & Processor Clocking	Broadcast Video Timing
Use Scenario: Supplying core, I/O, and transceiver reference clocks to Xilinx Versal or Intel Agilex FPGAs in compute-accelerated systems. IC Role / Device Role / Timing Role: Four independent outputs configured as 300 MHz LVDS (transceiver), 100 MHz HCSL (I/O), 50 MHz CMOS (core), and 27 MHz SSTL (video interface). Use Value: Reduces BOM count and layout complexity by consolidating FPGA clock tree into one programmable IC.	Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) and ST 2081 (6G-SDI) compliant 74.25 MHz and 148.5 MHz reference clocks to video encoders/decoders. IC Role / Device Role / Timing Role: Low-jitter clock generator with HCSL and LVDS outputs meeting broadcast-grade phase noise and wander requirements. Use Value: Ensures frame-accurate synchronization across multi-channel video processing pipelines without external jitter cleaners.

PCI Express Timing

Ethernet Switch Clocking

Use Scenario: Providing synchronized reference clocks to PCIe root complex and endpoint devices in servers and accelerators.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering 100 MHz HCSL and 125 MHz LVDS clocks with PCIe Gen 3/4-compliant jitter.

Use Value: Eliminates need for multiple oscillators and reduces board space while meeting strict PCIe SRNS and common clock jitter specs.

Use Scenario: Generating precise 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10 GbE PHYs and switch fabric interfaces.

IC Role / Device Role / Timing Role: Configurable clock buffer/generator supporting LVDS and CMOS outputs at mixed frequencies for multi-rate Ethernet silicon.

Use Value: Enables single-device timing for multi-port switches with independent frequency scaling and low-jitter distribution.

FPGA & Processor Clocking

Broadcast Video Timing

Use Scenario: Supplying core, I/O, and transceiver reference clocks to Xilinx Versal or Intel Agilex FPGAs in compute-accelerated systems.

IC Role / Device Role / Timing Role: Four independent outputs configured as 300 MHz LVDS (transceiver), 100 MHz HCSL (I/O), 50 MHz CMOS (core), and 27 MHz SSTL (video interface).

Use Value: Reduces BOM count and layout complexity by consolidating FPGA clock tree into one programmable IC.

Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) and ST 2081 (6G-SDI) compliant 74.25 MHz and 148.5 MHz reference clocks to video encoders/decoders.

IC Role / Device Role / Timing Role: Low-jitter clock generator with HCSL and LVDS outputs meeting broadcast-grade phase noise and wander requirements.

Use Value: Ensures frame-accurate synchronization across multi-channel video processing pipelines without external jitter cleaners.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05215-GM	Higher integration: 8 outputs, integrated crystal option, lower typical jitter (0.5 ps RMS), but larger 32-QFN package	Better suited for dense, multi-protocol systems requiring >4 outputs or crystal-less design	Select when needing ≥8 outputs or tighter jitter margin; requires PCB redesign due to different footprint
ICS8430I-01LG	Fixed-frequency 4-output LVDS buffer (no synthesis), 1.2 ps RMS jitter, no spread spectrum or pin-selectable configs	Limited to static clock fanout; lacks frequency flexibility and PCIe jitter optimization features	Choose only for simple, cost-sensitive fanout where all clocks are fixed and jitter <1 ps RMS is acceptable

Compared with Si5332A-D05215-GM and ICS8430I-01LG, the SI5335B-B05215-GMR uniquely balances field-programmable frequency agility, PCIe-optimized jitter performance, and compact 24-QFN packaging-making it optimal for mid-complexity systems requiring reconfigurable timing without layout overhaul.

Availability

SI5335B-B05215-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, 10GbE switch fabric designs, and FPGA-based telecom line cards requiring stable component supply, long-term lifecycle assurance, and factory-programmed configuration traceability.

Supply support for SI5335B-B05215-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5335 product line was designed to replace multiple discrete clock sources with a single, web-configurable, any-frequency generator-targeting high-speed serial interface timing in datacenter, networking, and broadcast infrastructure.

FAQ

What is the primary function of the SI5335B-B05215-GMR?

The SI5335B-B05215-GMR is a quad-output, web-customizable clock generator/buffer IC that synthesizes four independent, non-integer-related frequencies up to 350 MHz using Skyworks' MultiSynth fractional divider technology. It serves as a timing solution for PCIe, Ethernet, FPGA, and broadcast video systems, replacing multiple oscillators and clock ICs with a single configurable device.

Does the SI5335B-B05215-GMR support PCIe Gen 4 timing requirements?

Yes, the SI5335B-B05215-GMR meets PCIe Gen 4 common clock jitter specifications with ≤0.45 ps RMS (12 kHz–20 MHz) when configured with appropriate loop bandwidth (1.6 MHz) and differential outputs (e.g., HCSL). It is explicitly documented as PCIe Gen 1/2/3/4 common clock compliant and SRNS-compliant for Gen 3.

Can the SI5335B-B05215-GMR operate without an external crystal?

Yes, the SI5335B-B05215-GMR supports multiple reference inputs: external 25/27 MHz crystals, single-ended CMOS (10–200 MHz), or differential signals (10–350 MHz). Crystal operation is optional; the device can be driven directly by a system clock source, enabling crystal-free designs when a clean reference is available.

How many output voltage levels does the SI5335B-B05215-GMR support per bank?

The SI5335B-B05215-GMR supports four independent output supply voltages-1.5 V, 1.8 V, 2.5 V, and 3.3 V-assigned per output bank (VDDO0–VDDO3). This allows simultaneous interfacing with mixed-voltage components such as 1.8 V FPGAs, 2.5 V ASICs, and 3.3 V legacy peripherals without level shifters.

What is the significance of the "B05215" suffix in SI5335B-B05215-GMR?

The "B05215" suffix in SI5335B-B05215-GMR denotes a factory-programmed configuration: "B" indicates the Si5335B variant (standard performance grade), "05215" specifies a pre-defined frequency plan generated via Skyworks' ClockBuilder Pro tool-ensuring the device ships ready-to-use with validated settings for a target application, eliminating field programming.

SI5335B-B05215-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5335B-B05215-GMR FAQ

1.How can I place an order for SI5335B-B05215-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5335B-B05215-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5335B-B05215-GMR reliable?

The price and inventory of SI5335B-B05215-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5335B-B05215-GMR is usually 5 days.

3.What payment methods are accepted for SI5335B-B05215-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5335B-B05215-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5335B-B05215-GMR?

SI5335B-B05215-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5335B-B05215-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5335B-B05215-GMR?

For technical support, including SI5335B-B05215-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5335B-B05215-GMR requirements.

6.How does Aetrix verify that SI5335B-B05215-GMR is sourced from the original manufacturer or authorized distributors?

All SI5335B-B05215-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5335B-B05215-GMR meets industry standards.

7.What is the process for return or replacement of SI5335B-B05215-GMR?

All SI5335B-B05215-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5335B-B05215-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5335B-B05215-GMR part is unused and in its original packaging.

Return procedure for SI5335B-B05215-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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