Skyworks Solutions Inc. SI5335B-B05456-GMR

Overview

SI5335B-B05456-GMR from Skyworks Solutions is a web-customizable, quad-output clock generator/buffer IC supporting four independent non-integer-related frequencies up to 350 MHz. It features MultiSynth fractional synthesis with 0 ppm frequency error, dual PLL loop bandwidths (1.6 MHz / 475 kHz), and PCIe Gen 1–4 common-clock compliance. Used in high-speed serial interface timing for FPGA/processor clocking and Ethernet switch systems.

For engineers reviewing the SI5335B-B05456-GMR datasheet, SI5335B-B05456-GMR pinout, SI5335B-B05456-GMR application, or SI5335B-B05456-GMR equivalent, key selection criteria include jitter performance (0.7 ps RMS), output format flexibility (LVPECL/LVDS/HCSL/CMOS/SSTL), loss-of-signal detection, and pin-selectable frequency plans for multi-configuration system support.

Technical Context

The SI5335B-B05456-GMR implements a single PLL core with four independent MultiSynth fractional dividers per output bank, enabling simultaneous synthesis of unrelated frequencies without reference multiplication artifacts. Input supports crystal (25/27 MHz), CMOS (10–200 MHz), or differential (10–350 MHz) references.

Each of its four output banks can be configured as one differential pair or two single-ended signals, with per-driver voltage selection (1.5/1.8/2.5/3.3 V) and programmable control pins (P1–P6) for spread-spectrum enable, reset, OEB, and frequency plan selection (FS1/FS0). Loss-of-signal alarm is active on CLKIN/CLKINB inputs.

Key Specifications

Pinout & Package

SI5335B-B05456-GMR is housed in a 4 mm × 4 mm, 24-pin QFN package with exposed thermal pad. Pin assignments are fixed per the Si5335 family layout and validated for this variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with Si5338A-D-GM and ICS8430I-01LG, the SI5335B-B05456-GMR uniquely delivers any-frequency synthesis up to 350 MHz with PCIe Gen 4–compliant jitter and hardware-configurable multi-plan operation - making it the only option for dynamic, high-speed serial timing in next-gen compute and networking platforms.

Availability

SI5335B-B05456-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 timing, Ethernet switch clock distribution, and FPGA/processor clocking requiring stable component supply, factory-programmed configuration, and long-term industrial temperature support.

Supply support for SI5335B-B05456-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and industrial markets.

The Si5335 product line was designed to replace multiple discrete clock sources with a single, software-configurable, low-jitter timing IC - targeting high-speed serial interface timing in datacenter, telecom, and broadcast video systems.

FAQ

What is the maximum output frequency supported by the SI5335B-B05456-GMR?

The SI5335B-B05456-GMR supports up to 350 MHz on LVPECL, LVDS, CML, SSTL, and HSTL outputs; 250 MHz on HCSL; and 200 MHz on CMOS outputs. These limits are defined by electrical characteristics and driver capability - not configuration constraints - and apply across all operating temperatures and supply voltages.

Does the SI5335B-B05456-GMR support PCIe Gen 4 common-clock timing requirements?

Yes, the SI5335B-B05456-GMR is explicitly validated for PCIe Gen 4 common-clock operation with ≤0.45 ps RMS jitter (12 kHz–20 MHz) and meets total jitter specifications per PCI-SIG Base Specification 4.0 rev. 0.5 when configured with 1.6 MHz PLL loop bandwidth and HCSL outputs.

How many independent frequency configurations can be stored and selected on the SI5335B-B05456-GMR?

The SI5335B-B05456-GMR supports three independent, pin-selectable device configurations via FS1 and FS0 control inputs. Each configuration defines unique output frequencies, formats, voltages, and PLL settings - enabling hardware-triggered reconfiguration without I²C communication.

What input reference options does the SI5335B-B05456-GMR accept?

The SI5335B-B05456-GMR accepts 25 MHz or 27 MHz crystals directly on XA/XB pins, or AC-coupled CMOS (10–200 MHz), SSTL/HSTL (10–350 MHz), or differential (10–350 MHz) clock inputs on the same pins - with automatic input type detection and loss-of-signal monitoring.

Is the SI5335B-B05456-GMR pin-compatible with other Si5335 variants?

Yes, all Si5335 variants including SI5335B-B05456-GMR use the identical 24-QFN package and pinout. Configuration differences (e.g., factory-programmed frequency plans) are stored in on-chip NVM and do not affect mechanical or electrical pin compatibility.