Skyworks Solutions Inc. SI5335D-B04459-GMR

Overview

SI5335D-B04459-GMR from Skyworks Solutions is a web-customizable, quad-output clock generator/buffer IC supporting four independent non-integer-related frequencies up to 350 MHz. It features MultiSynth fractional synthesis with 0 ppm frequency error, PCIe Gen 1–4 common clock compliance, and dual selectable PLL loop bandwidths (1.6 MHz / 475 kHz). Used in high-speed serial interface timing for PCIe switch cards and FPGA-based telecom line cards.

For engineers reviewing the SI5335D-B04459-GMR datasheet, SI5335D-B04459-GMR pinout, SI5335D-B04459-GMR application, or SI5335D-B04459-GMR equivalent, key selection criteria include differential output jitter (0.7 ps RMS), flexible input support (25/27 MHz crystal or 10–350 MHz differential/CMOS), per-output voltage control (1.5/1.8/2.5/3.3 V), loss-of-signal alarm, and pin-selectable frequency plans.

Technical Context

The SI5335D-B04459-GMR integrates a single PLL with four independent MultiSynth fractional dividers, enabling simultaneous synthesis of unrelated output frequencies without external VCXOs or multiple clock ICs. Its architecture supports both clock generator mode (full synthesis) and buffer mode (PLL bypass), with sub-4 ns input-to-output propagation delay in buffer mode.

It accepts multiple reference inputs - 25 or 27 MHz crystal, or AC-coupled CMOS/SSTL/HSTL/differential signals from 10 to 350 MHz - and delivers configurable outputs in LVPECL, LVDS, CML, HCSL, CMOS, SSTL, or HSTL formats. Each of the four output banks supports either one differential pair or two single-ended clocks, with independent VDDO supply per bank.

Key Specifications

Pinout & Package

SI5335D-B04459-GMR is housed in a 24-lead, 4 mm × 4 mm QFN package with exposed thermal pad. Pin assignments are fixed per the Si5335 family; no variant-specific redefinition is documented for this part number.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with Si5345B-D08589-GM and ICS8430I-01T, SI5335D-B04459-GMR uniquely balances PCIe Gen4 compliance, web-customizability, and 24-QFN compactness - making it optimal for space-constrained, multi-standard timing in current-gen telecom and compute platforms.

Availability

SI5335D-B04459-GMR is available at Aetrix Electronics and suitable for PCIe switch timing, FPGA-based telecom line cards, broadcast video synchronization, and DSLAM/MSAN timing requiring stable component supply and factory-programmed configuration.

Supply support for SI5335D-B04459-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and precision analog components for infrastructure, automotive, and mobile markets.

The Si5335 product line was designed to replace multiple discrete clock sources with a single, software-configurable timing IC - targeting high-speed serial interface timing in datacenter, telecom, and broadcast equipment where flexibility and jitter performance are critical.

FAQ

What is the primary function of the SI5335D-B04459-GMR?

The SI5335D-B04459-GMR is a quad-output, any-frequency clock generator/buffer IC. It synthesizes up to four independent, non-integer-related output frequencies (up to 350 MHz) from a single reference input using Skyworks' MultiSynth fractional divider technology. Its core function is to replace multiple oscillators and clock ICs in complex timing architectures while guaranteeing 0 ppm frequency error and meeting PCIe Gen1–4 jitter specifications.

Does the SI5335D-B04459-GMR support crystal input?

Yes, the SI5335D-B04459-GMR supports 25 MHz or 27 MHz fundamental-mode crystals directly connected to the XA/CLKIN and XB/CLKINB pins. The device includes on-chip load capacitance (18 pF) and drive-level limiting (≤100 µW), eliminating external matching components. Crystal operation is fully supported across the full temperature range (–40 °C to +85 °C).

How many output formats does the SI5335D-B04459-GMR support?

The SI5335D-B04459-GMR supports six output formats: LVPECL, LVDS, CML, HCSL, CMOS, SSTL, and HSTL. Each of its four output banks can be independently configured for format, frequency, and voltage (1.5/1.8/2.5/3.3 V VDDO), enabling mixed-signal timing for heterogeneous systems - for example, LVDS to FPGAs, HCSL to PCIe slots, and CMOS to microcontrollers - all from one SI5335D-B04459-GMR device.

Is the SI5335D-B04459-GMR compliant with PCIe Gen4 timing requirements?

Yes, the SI5335D-B04459-GMR is PCIe Gen4 common clock compliant. When configured per Skyworks' recommended settings (e.g., 100 MHz HCSL outputs, 1.6 MHz PLL loop bandwidth), it achieves ≤0.45 ps RMS jitter - meeting the PCIe Base Specification 4.0 requirement. Validation is documented in Table 8 of the official datasheet (Rev. 1.4), and jitter measurements were performed using the Intel Clock Jitter Tool.

Can the SI5335D-B04459-GMR operate in clock buffer mode?

Yes, the SI5335D-B04459-GMR supports PLL bypass (buffer) mode, where the input clock is distributed directly to outputs with minimal added jitter (<4 ns propagation delay). In this mode, it functions as a low-skew, level-translating clock buffer with independent output format and voltage control - ideal for systems where the reference clock already meets jitter requirements and only fanout/level translation is needed.