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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5335D-B04562-GMR

Name: SI5335D-B04562-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5335D-B04562-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5335D-B04562-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5335D-B04562-GMR.pdf

Description:: IC 4OUT ANY FREQ <200MHZ 24QFN

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Product details

Overview

SI5335D-B04562-GMR from Skyworks Solutions is a web-customizable, quad-output clock generator/buffer IC supporting four independent, non-integer-related frequencies up to 350 MHz. It integrates patented MultiSynth fractional divider technology for 0 ppm synthesis error, operates in PLL or buffer mode, and delivers 0.7 ps RMS phase jitter. It is used in PCIe Gen 4 common-clock systems requiring low-jitter, multi-format clock distribution.

For engineers reviewing the SI5335D-B04562-GMR datasheet, SI5335D-B04562-GMR pinout, SI5335D-B04562-GMR application, or SI5335D-B04562-GMR equivalent, key selection criteria include its dual-loop-bandwidth (1.6 MHz / 475 kHz) support for PCIe/DSL jitter attenuation, pin-selectable frequency plans, loss-of-signal alarm, and flexible output voltage per driver (1.5–3.3 V).

Technical Context

The SI5335D-B04562-GMR implements a single high-performance PLL with two selectable loop bandwidths (1.6 MHz for PCIe Gen 4, 475 kHz for DSL), enabling precise jitter filtering across diverse serial protocols. Its architecture includes four independent MultiSynth fractional dividers, each driving one differential pair or two single-ended outputs.

Input flexibility includes crystal (25/27 MHz), CMOS (10–200 MHz), SSTL/HSTL (10–350 MHz), or differential (10–350 MHz) references. Output formats are independently configurable as LVPECL/LVDS/CML (1–350 MHz), HCSL (1–250 MHz), CMOS (1–200 MHz), or SSTL/HSTL (1–350 MHz), with per-driver supply voltage selection (1.5/1.8/2.5/3.3 V).

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	Four banks: each supports one differential pair or two single-ended outputs; total up to 4 diff / 8 SE clocks
Max output frequency	350 MHz (LVPECL/LVDS/CML/SSTL/HSTL); 250 MHz (HCSL); 200 MHz (CMOS)
Phase jitter (RMS)	0.7 ps RMS (12 kHz–20 MHz, 1.6 MHz loop BW, differential outputs)
Loop bandwidth options	1.6 MHz (PCIe Gen 4 jitter attenuation) or 475 kHz (DSL jitter attenuation)
Supply voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently selectable 1.5/1.8/2.5/3.3 V per bank
Operating temperature	–40 °C to +85 °C, suitable for industrial and telecom line card environments
Package	24-pin QFN, 4 mm × 4 mm, 0.5 mm pitch, exposed thermal pad

Pinout & Package

The SI5335D-B04562-GMR is housed in a 24-lead QFN package (4 mm × 4 mm) with an exposed thermal pad. Pin assignments follow the standard Si5335 top-view layout.

Pin/Terminal	Circuit Role	Design Meaning
1, 2 (XA/CLKIN, XB/CLKINB)	Differential reference input	Accepts AC-coupled LVDS/LVPECL/HCSL/CML (10–350 MHz); internal 10 kΩ termination
3–4, 6–7, 10–11, 13–14 (CLK0A/B, CLK1A/B, CLK2A/B, CLK3A/B)	Differential clock outputs	Four independent banks; each pair configurable as LVPECL/LVDS/CML/HCSL with per-bank VDDO
5, 8, 9, 12, 15–16, 18–24 (VDD, VDDO0–3, GND, LOS, P1–P6, RSVD_GND)	Power, control & status	VDD core (1.8/2.5/3.3 V); VDDOx per output bank (1.5–3.3 V); LOS alarm open-drain output; five multifunction pins (P1–P6) for OEB, FS[1:0], SSENB, RESET

Key Features

Feature	Design Value
MultiSynth fractional synthesis	Enables any-frequency output generation (1–350 MHz) with 0 ppm frequency error across all four outputs
Three pin-selectable configurations	Allows one device to replace three discrete clock generators via FS[1:0] and master reset control
PCIe Gen 1/2/3/4 & SRNS compliance	Validated jitter performance (≤0.45 ps RMS for Gen 3/4) meets common-clock and separate-reference timing requirements
Loss-of-signal (LOS) detection	Monitors input clock presence with 2.6–5 µs detection time and automatic failover signaling
Web-based ClockBuilder Pro customization	Factory-programmed configuration delivered in ≤2 weeks with no MOQ; eliminates custom mask costs and long lead times

Applications

PCI Express Gen 4 System Clocking	Telecom Line Card Timing
Use Scenario: Providing synchronized, low-jitter reference clocks to multiple PCIe Gen 4 endpoints and root complexes in a server motherboard or switch fabric. IC Role / Device Role / Timing Role: Quad-output clock generator operating in PLL mode with 1.6 MHz loop bandwidth to attenuate reference clock jitter per PCIe Base Spec 4.0. Use Value: Eliminates need for four discrete oscillators; achieves <0.45 ps RMS jitter at 100 MHz HCSL outputs, meeting PCIe Gen 4 common-clock TJ budget.	Use Scenario: Distributing precisely aligned clocks across DSPs, FPGAs, and SerDes on a carrier-grade line card supporting multiple protocols (SONET, OTN, CPRI). IC Role / Device Role / Timing Role: Configurable universal buffer and level translator with independent output format and voltage per bank. Use Value: Single device drives LVDS (FPGA), HCSL (SerDes), and CMOS (control logic) loads simultaneously at 156.25 MHz, 125 MHz, and 25 MHz respectively.
Ethernet Switch/Routing Platform	Broadcast Video Timing Distribution
Use Scenario: Generating synchronous clocks for 1 GbE and 10 GbE PHYs, packet processors, and memory interfaces in a modular switch ASIC platform. IC Role / Device Role / Timing Role: Clock buffer with PLL bypass capability for deterministic latency; supports spread spectrum enable (SSENB) for EMI reduction. Use Value: Sub-4 ns input-to-output propagation delay in buffer mode ensures tight skew control; 0.7 ps RMS jitter preserves signal integrity at 156.25 MHz SGMII.	Use Scenario: Delivering genlock-accurate pixel clocks (27 MHz, 74.25 MHz, 148.5 MHz) and audio word clocks (48 kHz, 96 kHz) to video encoders, decoders, and HDMI transmitters in broadcast infrastructure. IC Role / Device Role / Timing Role: Any-frequency clock generator synthesizing non-integer-related video/audio rates from a single 25 MHz crystal reference. Use Value: Replaces multiple crystals and fanout buffers; MultiSynth guarantees exact frequency accuracy (0 ppm error) critical for SMPTE ST 2059-2 compliance.

PCI Express Gen 4 System Clocking

Telecom Line Card Timing

Use Scenario: Providing synchronized, low-jitter reference clocks to multiple PCIe Gen 4 endpoints and root complexes in a server motherboard or switch fabric.

IC Role / Device Role / Timing Role: Quad-output clock generator operating in PLL mode with 1.6 MHz loop bandwidth to attenuate reference clock jitter per PCIe Base Spec 4.0.

Use Value: Eliminates need for four discrete oscillators; achieves <0.45 ps RMS jitter at 100 MHz HCSL outputs, meeting PCIe Gen 4 common-clock TJ budget.

Use Scenario: Distributing precisely aligned clocks across DSPs, FPGAs, and SerDes on a carrier-grade line card supporting multiple protocols (SONET, OTN, CPRI).

IC Role / Device Role / Timing Role: Configurable universal buffer and level translator with independent output format and voltage per bank.

Use Value: Single device drives LVDS (FPGA), HCSL (SerDes), and CMOS (control logic) loads simultaneously at 156.25 MHz, 125 MHz, and 25 MHz respectively.

Ethernet Switch/Routing Platform

Broadcast Video Timing Distribution

Use Scenario: Generating synchronous clocks for 1 GbE and 10 GbE PHYs, packet processors, and memory interfaces in a modular switch ASIC platform.

IC Role / Device Role / Timing Role: Clock buffer with PLL bypass capability for deterministic latency; supports spread spectrum enable (SSENB) for EMI reduction.

Use Value: Sub-4 ns input-to-output propagation delay in buffer mode ensures tight skew control; 0.7 ps RMS jitter preserves signal integrity at 156.25 MHz SGMII.

Use Scenario: Delivering genlock-accurate pixel clocks (27 MHz, 74.25 MHz, 148.5 MHz) and audio word clocks (48 kHz, 96 kHz) to video encoders, decoders, and HDMI transmitters in broadcast infrastructure.

IC Role / Device Role / Timing Role: Any-frequency clock generator synthesizing non-integer-related video/audio rates from a single 25 MHz crystal reference.

Use Value: Replaces multiple crystals and fanout buffers; MultiSynth guarantees exact frequency accuracy (0 ppm error) critical for SMPTE ST 2059-2 compliance.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06589-GM	Higher integration: 8 outputs, integrated crystal option, lower jitter (0.35 ps RMS), but larger 32-QFN package	Targeted at high-port-count switches and 5G baseband units requiring >4 outputs and tighter jitter specs	Select when needing ≥6 outputs or sub-0.4 ps RMS jitter; not pin-compatible with SI5335D-B04562-GMR
ICS853S01IAGLF	Fixed-function 4-output LVDS buffer (no synthesis), 2.5 V only, no spread spectrum or LOS, higher jitter (1.2 ps RMS)	Suitable only for simple fanout of existing clean clocks where frequency flexibility is unnecessary	Select only for cost-sensitive, fixed-frequency buffering; lacks MultiSynth, PLL, or programmability

Compared with Si5332A-D06589-GM and ICS853S01IAGLF, the SI5335D-B04562-GMR uniquely balances web-customizable synthesis, quad-output flexibility, PCIe Gen 4 compliance, and compact 24-QFN packaging-making it optimal for mid-complexity systems requiring both frequency agility and space efficiency.

Availability

SI5335D-B04562-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 system clocking, telecom line card timing, and Ethernet switching applications requiring stable component supply, factory-programmed configuration, and rapid prototyping support.

Supply support for SI5335D-B04562-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5335 product line was designed to replace multiple discrete clock sources with a single, field-programmable, any-frequency clock generator optimized for high-speed serial interfaces including PCIe, Ethernet, and telecom standards.

FAQ

What is the primary function of the SI5335D-B04562-GMR?

The SI5335D-B04562-GMR is a quad-output, web-customizable clock generator/buffer IC that synthesizes four independent, non-integer-related frequencies up to 350 MHz using Skyworks' MultiSynth fractional divider technology. It serves as both a precision clock generator (with PLL) and a low-latency buffer (PLL bypass), delivering 0.7 ps RMS phase jitter and supporting PCIe Gen 4, DSL, and broadcast video timing applications. The SI5335D-B04562-GMR replaces multiple oscillators and fanout buffers in complex digital systems.

Does the SI5335D-B04562-GMR support PCIe Gen 4 timing compliance?

Yes, the SI5335D-B04562-GMR is PCIe Gen 4 common-clock compliant, achieving ≤0.45 ps RMS jitter (12 kHz–20 MHz) at 100 MHz HCSL outputs with 1.6 MHz loop bandwidth. It also meets PCIe Gen 3 SRNS requirements (≤0.32 ps RMS) and supports spread spectrum for EMI reduction. Validation is performed per PCI-SIG specifications using the Skyworks PCIe Clock Jitter Tool, confirming full interoperability in Gen 4 root complex and endpoint designs. The SI5335D-B04562-GMR is widely deployed in Gen 4 switch and accelerator cards.

How many output configurations can be stored and selected on the SI5335D-B04562-GMR?

Three independent, pin-selectable device configurations can be factory-programmed into the SI5335D-B04562-GMR using the FS[1:0] control pins (P5 and P6). Each configuration defines unique output frequencies, formats, drive strengths, and voltage levels. This enables a single SI5335D-B04562-GMR to serve as three distinct clock generators in different system modes (e.g., boot, normal operation, test), eliminating board-level configuration jumpers or firmware reprogramming during runtime.

What input reference options does the SI5335D-B04562-GMR support?

The SI5335D-B04562-GMR accepts multiple reference inputs: a 25 or 27 MHz fundamental-mode crystal (internally terminated), CMOS (10–200 MHz), SSTL/HSTL (10–350 MHz), or differential (LVDS/LVPECL/HCSL/CML, 10–350 MHz) signals. Differential inputs use pins 1 and 2 with internal 10 kΩ termination; single-ended CMOS uses pin 1 only. The SI5335D-B04562-GMR includes loss-of-signal detection with 2.6–5 µs response time, ensuring robust failover in mission-critical timing paths.

Is the SI5335D-B04562-GMR pin-compatible with other Si5335 variants?

Yes, all Si5335 family members-including the SI5335D-B04562-GMR-are pin-compatible across the 24-QFN package variant. They share identical pin assignments, power domains (VDD, VDDO0–3), control pin functions (P1–P6), and output bank layout (CLK0A/B through CLK3A/B). Configuration differences (e.g., output count, frequency plan, spread spectrum settings) are stored in one-time-programmable (OTP) memory and do not affect mechanical or electrical pin behavior. This allows seamless migration between Si5335 variants during design-in or qualification.

SI5335D-B04562-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5335D-B04562-GMR FAQ

1.How can I place an order for SI5335D-B04562-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5335D-B04562-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5335D-B04562-GMR reliable?

The price and inventory of SI5335D-B04562-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5335D-B04562-GMR is usually 5 days.

3.What payment methods are accepted for SI5335D-B04562-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5335D-B04562-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5335D-B04562-GMR?

SI5335D-B04562-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5335D-B04562-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5335D-B04562-GMR?

For technical support, including SI5335D-B04562-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5335D-B04562-GMR requirements.

6.How does Aetrix verify that SI5335D-B04562-GMR is sourced from the original manufacturer or authorized distributors?

All SI5335D-B04562-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5335D-B04562-GMR meets industry standards.

7.What is the process for return or replacement of SI5335D-B04562-GMR?

All SI5335D-B04562-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5335D-B04562-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5335D-B04562-GMR part is unused and in its original packaging.

Return procedure for SI5335D-B04562-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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