Skyworks Solutions Inc. SI5335D-B04662-GMR

Overview

SI5335D-B04662-GMR from Skyworks Solutions is a web-customizable quad clock generator/buffer IC with four independently synthesized non-integer-related output frequencies up to 350 MHz, low phase jitter of 0.7 ps RMS, PCIe Gen 1–4 common clock compliance, and configurable output formats (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL) per bank. It serves as a single-chip replacement for multiple discrete clock sources in high-speed serial interface timing systems.

For engineers reviewing the SI5335D-B04662-GMR datasheet, SI5335D-B04662-GMR pinout, SI5335D-B04662-GMR application, or SI5335D-B04662-GMR equivalent, key selection considerations include its MultiSynth fractional synthesis architecture, dual PLL loop bandwidth options (1.6 MHz / 475 kHz), loss-of-signal alarm, five user-assignable control pins, and factory-programmable configuration via ClockBuilder Pro.

Technical Context

The SI5335D-B04662-GMR implements Skyworks' patented MultiSynth fractional divider technology across four independent synthesis paths, guaranteeing 0 ppm frequency synthesis error regardless of output frequency or format combination. Each output bank supports either one differential pair or two single-ended outputs, with independent voltage selection (1.5/1.8/2.5/3.3 V) per driver bank.

It features a dual-loop PLL architecture with selectable bandwidths (1.6 MHz for PCIe jitter attenuation, 475 kHz for DSL applications), pin-selectable device configurations (up to three), and flexible reference inputs including 25/27 MHz crystal, CMOS (10–200 MHz), SSTL/HSTL (10–350 MHz), or differential (10–350 MHz). The device operates over –40 to +85 °C with core supply options of 1.8/2.5/3.3 V.

Key Specifications

Pinout & Package

The SI5335D-B04662-GMR is housed in a 24-lead QFN package (4 mm × 4 mm) with an exposed thermal pad. Pin assignments are fixed per the Si5335 family layout and validated for this variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with Si5345A-D06899-GM and ICS8430I-01T, the SI5335D-B04662-GMR delivers optimal balance of configurability, PCIe Gen 4 readiness, and footprint efficiency - offering web-customized multi-frequency synthesis in a compact 4×4 mm QFN without requiring redesign for most mid-tier communications platforms.

Availability

SI5335D-B04662-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server backplanes, 10G Ethernet switching, and broadcast video timing applications requiring stable component supply, long-term lifecycle assurance, and factory-programmed configuration traceability.

Supply support for SI5335D-B04662-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5335 product line was designed to replace multiple discrete clock sources with a single, field-configurable, any-frequency clock generator optimized for PCIe, Ethernet, and video timing systems demanding sub-ps jitter and multi-protocol compatibility.

FAQ

What is the primary function of the SI5335D-B04662-GMR?

The SI5335D-B04662-GMR is a quad-output, web-customizable clock generator/buffer IC that synthesizes four independent, non-integer-related frequencies up to 350 MHz using Skyworks' MultiSynth fractional divider technology. It replaces multiple oscillators and clock ICs in systems requiring precise, low-jitter timing for PCIe, Ethernet, and video applications. Its design enables zero-ppm frequency error and supports both generator and buffer operating modes.

Does the SI5335D-B04662-GMR support PCIe Gen 4 timing requirements?

Yes, the SI5335D-B04662-GMR meets PCIe Gen 4 common clock jitter specifications: ≤0.45 ps RMS (12 kHz–20 MHz) with 1.6 MHz PLL loop bandwidth and spread spectrum enabled. It is explicitly certified PCIe Gen 4 compliant in the official datasheet (Rev. 1.4, Table 8), and supports both common clock and SRNS architectures. The SI5335D-B04662-GMR achieves this using its low-noise MultiSynth synthesis and optimized loop filter settings.

How many output configurations does the SI5335D-B04662-GMR support?

The SI5335D-B04662-GMR supports up to three independent, pin-selectable device configurations stored in on-chip memory. These allow users to define distinct frequency plans, output formats, and control pin functions - enabling one physical SI5335D-B04662-GMR to serve as three different clock generators in varying system states or board revisions without reprogramming.

What package type and dimensions does the SI5335D-B04662-GMR use?

The SI5335D-B04662-GMR uses a 24-lead QFN package measuring 4 mm × 4 mm with 0.5 mm pitch and an exposed thermal pad. This compact footprint is standardized across the Si5335 family and validated for thermal performance up to 85 °C ambient. The pinout matches the Si5335 functional diagram and is documented in the "Pin Assignments" section of the datasheet (Rev. 1.4, page 2).

Can the SI5335D-B04662-GMR operate with a single-ended input clock?

Yes, the SI5335D-B04662-GMR accepts single-ended input clocks on pin 1 (XA/CLKIN) in CMOS, SSTL, or HSTL formats across 10–200 MHz. It also supports differential inputs (LVDS/LVPECL/HCSL/CML) on pins 1 and 2. Input flexibility extends to 25/27 MHz crystals directly connected to the on-chip oscillator circuit. All input types are fully supported in both clock generator and buffer modes of the SI5335D-B04662-GMR.