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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5335D-B04721-GMR

Name: SI5335D-B04721-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5335D-B04721-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5335D-B04721-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5335D-B04721-GMR.pdf

Description:: IC 4OUT ANY FREQ <200MHZ 24QFN

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Product details

Overview

SI5335D-B04721-GMR from Skyworks Solutions is a web-customizable, quad-output clock generator/buffer IC with MultiSynth fractional synthesis. It delivers four independent, non-integer-related frequencies up to 350 MHz, supports LVPECL/LVDS/HCSL/CMOS/SSTL outputs, achieves 0.7 ps RMS phase jitter, and operates across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It is deployed in PCIe Gen 4 common-clock systems requiring low-jitter, multi-format timing.

For engineers reviewing the SI5335D-B04721-GMR datasheet, SI5335D-B04721-GMR pinout, SI5335D-B04721-GMR application, or SI5335D-B04721-GMR equivalent, key selection considerations include its dual PLL loop bandwidth (475 kHz / 1.6 MHz), loss-of-signal alarm, five user-assignable control pins, PCIe Gen 1–4 compliance, and factory-configurable output formats and voltages per bank.

Technical Context

The SI5335D-B04721-GMR implements Skyworks' patented MultiSynth fractional divider architecture across four independent synthesis paths, enabling zero-ppm frequency error for any output combination within 1–350 MHz. Its dual-loop PLL supports jitter attenuation in both high-bandwidth (PCIe) and low-bandwidth (DSL) applications.

It integrates a flexible input stage accepting crystal (25/27 MHz), CMOS (10–200 MHz), SSTL/HSTL (10–350 MHz), or differential (10–350 MHz) references, and features independently configurable output drivers with per-bank voltage selection (1.5/1.8/2.5/3.3 V) and format assignment (LVPECL, LVDS, CML, HCSL, CMOS, SSTL, HSTL).

Key Specifications

Parameter	Value and Actual Design Meaning
Output count & type	Four banks: each supports one differential pair or two single-ended outputs (up to 4 diff / 8 SE)
Max output frequency	350 MHz (LVPECL/LVDS/CML/SSTL/HSTL); 250 MHz (HCSL); 200 MHz (CMOS)
Phase jitter (RMS)	0.7 ps (12 kHz–20 MHz, generator mode, 1.6 MHz loop BW)
PLL loop bandwidth	Selectable 475 kHz or 1.6 MHz - enables optimization for DSL jitter attenuation or PCIe Gen 4 compliance
Supply voltage	Core: 1.8/2.5/3.3 V; Output buffers: independently configurable 1.4–3.63 V per bank
Operating temperature	–40 °C to +85 °C - qualified for industrial and telecom line card environments
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch - compatible with standard reflow and high-density PCB layouts

Pinout & Package

The SI5335D-B04721-GMR is housed in a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.4 datasheet, including dual differential inputs (XA/CLKIN, XB/CLKINB), four differential output banks (CLK0A/B through CLK3A/B), dedicated LOS alarm, and five multifunction control pins (P1–P3, P5, P6).

Pin/Terminal	Circuit Role	Design Meaning
XA/CLKIN, XB/CLKINB (Pins 1, 2)	Differential reference input	Accepts 10–350 MHz AC-coupled LVDS/LVPECL/HCSL/CML; internal 10 kΩ termination; supports crystal oscillator interface
CLK0A/CLK0B to CLK3A/CLK3B (Pins 3–4, 6–7, 10–11, 13–14)	Differential clock outputs	Four independent banks; each configurable as LVPECL, LVDS, CML, or HCSL; per-bank VDDO supply
VDDO0–VDDO3 (Pins 5, 8, 9, 12)	Output buffer supply rails	Independent 1.4–3.63 V supplies per output bank - enables mixed-voltage system interfacing
P1, P2, P3, P5, P6 (Pins 15–16, 18–19, 21)	Programmable control inputs	Configurable as OEB (output enable), SSENB (spread spectrum), FS[1:0] (frequency plan select), or RESET
LOS (Pin 8)	Loss-of-signal alarm output	Open-drain active-low signal asserting within 2.6–5 µs of input failure - enables system-level fault detection

Key Features

Feature	Design Value
MultiSynth fractional synthesis	Enables any-frequency generation (1–350 MHz) with 0 ppm synthesis error - eliminates need for multiple crystals or clock ICs
Three pin-selectable configurations	One device replaces up to three discrete clock generators via hardware-selectable frequency plans - reduces BOM and layout complexity
PCIe Gen 1–4 common clock compliance	Meets jitter requirements (e.g., ≤0.45 ps RMS for Gen 3/4) without external filtering - simplifies high-speed serial interface timing validation
Flexible output driver configuration	Per-bank voltage (1.5/1.8/2.5/3.3 V) and format (LVPECL/LVDS/HCSL/CMOS/SSTL) assignment - supports heterogeneous SoC/FPGA I/O standards
Low-power operation	45 mA core current in generator mode; 12 mA in buffer (PLL bypass) mode - suitable for thermally constrained embedded systems

Applications

PCI Express Gen 4 System Clocking	Telecom Line Card Timing
Use Scenario: Providing synchronized 100 MHz common clock to multiple PCIe Gen 4 endpoints and root complexes in a server motherboard or switch fabric. IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, spread-spectrum-enabled reference clocks compliant with PCIe Gen 4 common clock specification. Use Value: Achieves ≤0.45 ps RMS jitter at 100 MHz using 1.6 MHz PLL bandwidth - meets Intel's Gen 4 jitter mask without external cleanup circuitry.	Use Scenario: Generating multiple synchronous clocks (e.g., 155.52 MHz, 622.08 MHz, 2.488 GHz derivatives) for SONET/SDH framers and SerDes on a telecom line card. IC Role / Device Role / Timing Role: Any-frequency clock synthesizer replacing discrete oscillators and fanout buffers in OC-48/OC-192 timing subsystems. Use Value: 0 ppm synthesis error ensures deterministic phase alignment across all outputs - critical for TDM multiplexing and jitter-sensitive CDR lock.
Ethernet Switch Fabric Clocking	FPGA-Based Broadcast Video Timing
Use Scenario: Supplying 125 MHz, 250 MHz, and 312.5 MHz clocks to 10GbE/25GbE PHYs and packet processors in a modular Ethernet switch. IC Role / Device Role / Timing Role: Configurable clock buffer/generator supporting mixed differential (LVDS/HCSL) and single-ended (CMOS) outputs for multi-chip timing distribution. Use Value: Independent output voltage per bank (1.8 V/2.5 V/3.3 V) allows direct interfacing with diverse PHY and ASIC I/O standards - eliminates level-shifter components.	Use Scenario: Delivering SMPTE-compliant 74.25 MHz, 148.5 MHz, and 297 MHz pixel clocks plus auxiliary sync signals (HSYNC/VSYNC) to FPGA-based video processing pipelines. IC Role / Device Role / Timing Role: Low-phase-jitter (0.7 ps RMS) clock generator with precise duty-cycle control (45–55%) for pixel clock integrity. Use Value: Sub-1 ps RMS jitter prevents visible artifacts in 4K/8K video streams - exceeds SMPTE ST 2059-2 jitter tolerance for professional broadcast equipment.

PCI Express Gen 4 System Clocking

Telecom Line Card Timing

Use Scenario: Providing synchronized 100 MHz common clock to multiple PCIe Gen 4 endpoints and root complexes in a server motherboard or switch fabric.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, spread-spectrum-enabled reference clocks compliant with PCIe Gen 4 common clock specification.

Use Value: Achieves ≤0.45 ps RMS jitter at 100 MHz using 1.6 MHz PLL bandwidth - meets Intel's Gen 4 jitter mask without external cleanup circuitry.

Use Scenario: Generating multiple synchronous clocks (e.g., 155.52 MHz, 622.08 MHz, 2.488 GHz derivatives) for SONET/SDH framers and SerDes on a telecom line card.

IC Role / Device Role / Timing Role: Any-frequency clock synthesizer replacing discrete oscillators and fanout buffers in OC-48/OC-192 timing subsystems.

Use Value: 0 ppm synthesis error ensures deterministic phase alignment across all outputs - critical for TDM multiplexing and jitter-sensitive CDR lock.

Ethernet Switch Fabric Clocking

FPGA-Based Broadcast Video Timing

Use Scenario: Supplying 125 MHz, 250 MHz, and 312.5 MHz clocks to 10GbE/25GbE PHYs and packet processors in a modular Ethernet switch.

IC Role / Device Role / Timing Role: Configurable clock buffer/generator supporting mixed differential (LVDS/HCSL) and single-ended (CMOS) outputs for multi-chip timing distribution.

Use Value: Independent output voltage per bank (1.8 V/2.5 V/3.3 V) allows direct interfacing with diverse PHY and ASIC I/O standards - eliminates level-shifter components.

Use Scenario: Delivering SMPTE-compliant 74.25 MHz, 148.5 MHz, and 297 MHz pixel clocks plus auxiliary sync signals (HSYNC/VSYNC) to FPGA-based video processing pipelines.

IC Role / Device Role / Timing Role: Low-phase-jitter (0.7 ps RMS) clock generator with precise duty-cycle control (45–55%) for pixel clock integrity.

Use Value: Sub-1 ps RMS jitter prevents visible artifacts in 4K/8K video streams - exceeds SMPTE ST 2059-2 jitter tolerance for professional broadcast equipment.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5341-B-GM	Higher integration: 10 outputs, integrated jitter cleaner, wider frequency range (up to 1 GHz), larger 32-QFN package	Targeted at ultra-low-jitter (<0.2 ps RMS) applications like 100G/400G optical modules and high-end test equipment	Choose Si5341-B-GM when >4 outputs, sub-0.3 ps jitter, or integrated jitter cleaning is required - not drop-in compatible due to pin count and feature set
ICS8430I-01T	Fixed-function 4-output LVDS clock generator; no fractional synthesis; max 250 MHz; 3.3 V only; no programmable control pins	Suitable for cost-sensitive, static-frequency applications where flexibility and jitter performance are secondary to unit cost	Choose ICS8430I-01T for simple, fixed-ratio fanout in legacy systems - lacks PCIe Gen 4 compliance, spread spectrum, or multi-voltage support

Compared with Si5341-B-GM and ICS8430I-01T, the SI5335D-B04721-GMR uniquely balances field-programmable frequency agility, PCIe Gen 4 readiness, and compact 24-QFN packaging - making it optimal for mid-tier networking and compute platforms requiring upgradeability without overengineering.

Availability

SI5335D-B04721-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server motherboards, telecom line cards, and Ethernet switch fabrics requiring stable component supply, long-term lifecycle assurance, and factory-customized timing solutions.

Supply support for SI5335D-B04721-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5335 product line was designed to replace multiple discrete clock sources with a single, web-configurable, any-frequency clock generator - targeting high-density, high-performance systems in datacenter, telecom, and broadcast infrastructure.

FAQ

What is the primary function of the SI5335D-B04721-GMR?

The SI5335D-B04721-GMR is a quad-output, web-customizable clock generator/buffer IC that synthesizes four independent, non-integer-related frequencies up to 350 MHz using Skyworks' MultiSynth fractional divider technology. It serves as a timing source in PCIe Gen 4, telecom, and Ethernet systems, offering 0.7 ps RMS phase jitter and support for LVPECL, LVDS, HCSL, CMOS, SSTL, and HSTL output formats. The SI5335D-B04721-GMR replaces multiple oscillators and clock ICs with a single configurable device.

Does the SI5335D-B04721-GMR support PCIe Gen 4 timing requirements?

Yes, the SI5335D-B04721-GMR is PCIe Gen 4 common clock compliant, achieving ≤0.45 ps RMS jitter at 100 MHz with a 1.6 MHz PLL loop bandwidth. It meets the PCI-SIG Base Specification 4.0 rev. 0.5 jitter mask for Gen 4 systems and supports spread spectrum modulation for EMI reduction. The SI5335D-B04721-GMR also complies with PCIe Gen 1/2/3 and SRNS requirements, making it suitable for multi-generation platform designs.

How many output configurations can be stored and selected on the SI5335D-B04721-GMR?

The SI5335D-B04721-GMR supports up to three independent, pin-selectable device configurations. These are programmed via the FS1 and FS0 control pins (P5 and P6), allowing hardware-based switching between different frequency plans, output formats, and voltage settings without firmware intervention. This capability enables one SI5335D-B04721-GMR to serve as three distinct clock generators in field-upgradable systems.

What input reference options does the SI5335D-B04721-GMR accept?

The SI5335D-B04721-GMR accepts multiple input references: a 25 or 27 MHz crystal connected to XA/XB pins; a single-ended CMOS clock (10–200 MHz); or differential inputs (LVDS, LVPECL, HCSL, CML) from 10 to 350 MHz. Input impedance is 10 kΩ with 3.5 pF capacitance. The SI5335D-B04721-GMR includes loss-of-signal detection with 2.6–5 µs response time, ensuring robust reference monitoring.

Is the SI5335D-B04721-GMR pin-compatible with other Si5335 variants?

Yes, all Si5335 family members, including the SI5335D-B04721-GMR, share the same 24-QFN package and pinout. Differences between variants (e.g., SI5335B, SI5335C, SI5335D) relate to factory-programmed features such as output count, frequency plan, and default configuration - not physical layout. The SI5335D-B04721-GMR retains full electrical and mechanical compatibility with other Si5335 devices in the same package variant.

SI5335D-B04721-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5335D-B04721-GMR FAQ

1.How can I place an order for SI5335D-B04721-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5335D-B04721-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5335D-B04721-GMR reliable?

The price and inventory of SI5335D-B04721-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5335D-B04721-GMR is usually 5 days.

3.What payment methods are accepted for SI5335D-B04721-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5335D-B04721-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5335D-B04721-GMR?

SI5335D-B04721-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5335D-B04721-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5335D-B04721-GMR?

For technical support, including SI5335D-B04721-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5335D-B04721-GMR requirements.

6.How does Aetrix verify that SI5335D-B04721-GMR is sourced from the original manufacturer or authorized distributors?

All SI5335D-B04721-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5335D-B04721-GMR meets industry standards.

7.What is the process for return or replacement of SI5335D-B04721-GMR?

All SI5335D-B04721-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5335D-B04721-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5335D-B04721-GMR part is unused and in its original packaging.

Return procedure for SI5335D-B04721-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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