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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5335D-B15677-GM

Name: SI5335D-B15677-GM
Brand: Skyworks Solutions Inc.
SKU: SI5335D-B15677-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5335D-B15677-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5335D-B15677-GM.pdf

Description:: 4-OUTPUT, ANY FREQUENCY (< 200 M

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5335D-B15677-GM from Skyworks Solutions is a web-customizable quad clock generator/buffer IC with four independent, non-integer-related output frequencies up to 350 MHz, 0.7 ps RMS phase jitter, PCIe Gen 1–4 common clock compliance, and configurable LVPECL/LVDS/HCSL/CMOS/SSTL outputs - deployed in high-speed Ethernet switches and PCIe-based FPGA systems.

For engineers reviewing the SI5335D-B15677-GM datasheet, SI5335D-B15677-GM pinout, SI5335D-B15677-GM application, or SI5335D-B15677-GM equivalent, this page delivers verified technical context, exact pin functions, real-world application mappings, and validated alternative options for clock tree consolidation in telecom and datacenter designs.

Technical Context

The SI5335D-B15677-GM implements Skyworks' MultiSynth fractional divider architecture across four independent synthesis banks, each supporting either one differential pair or two single-ended outputs. Its dual-loop bandwidth selection (1.6 MHz or 475 kHz) enables optimized jitter attenuation for PCIe or DSL applications.

It accepts flexible input references - 25/27 MHz crystal, or AC-coupled CMOS/SSTL/HSTL/differential signals from 10–350 MHz - and supports per-output voltage selection (1.5/1.8/2.5/3.3 V) and format configuration. Loss-of-signal detection, five programmable control pins (P1–P6), and three pin-selectable device configurations enable system-level flexibility without firmware.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Count & Type	Four banks: each supports 1 differential (LVPECL/LVDS/CML/HCSL) or 2 single-ended (CMOS/SSTL/HSTL) outputs - enables mixed-format clock distribution from one IC.
Max Output Frequency	350 MHz (LVPECL/LVDS/CML/SSTL/HSTL); 250 MHz (HCSL); 200 MHz (CMOS) - covers PCIe Gen4 (100 MHz), 10GbE (156.25 MHz), and broadcast video (270 MHz) requirements.
Phase Jitter (RMS)	0.7 ps (12 kHz–20 MHz, 1.6 MHz loop BW) - meets PCIe Gen3 SRNS (≤0.32 ps) and Gen4 (≤0.45 ps) jitter budgets when configured per spec.
Input Reference Options	25/27 MHz crystal; or 10–350 MHz differential/CMOS/SSTL/HSTL - eliminates need for external oscillator in most embedded timing applications.
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently selectable 1.5/1.8/2.5/3.3 V - supports mixed-voltage SoC/FPGA interfaces without level shifters.
Operating Temperature	–40 °C to +85 °C - qualified for industrial and telecom line card environments with no derating.
Package	24-pin QFN, 4 mm × 4 mm - compact footprint compatible with high-density PCB layouts and automated assembly.

Pinout & Package

SI5335D-B15677-GM uses a 24-pin, 4 mm × 4 mm QFN package with exposed thermal pad. Pin functions are fully programmable via P1–P6 control inputs and device configuration.

Pin/Terminal	Circuit Role	Design Meaning
1, 2 (XA/CLKIN, XB/CLKINB)	Differential reference input	Accepts 10–350 MHz LVDS/LVPECL/CML/HCSL; internal 100 Ω termination enables direct connection to crystal or clock source.
3–4, 6–7, 10–11, 13–14 (CLK0A/B to CLK3A/B)	Differential clock outputs	Four independent banks; each pair configurable as LVPECL/LVDS/CML/HCSL with per-bank VDDO voltage selection.
8 (LOS)	Loss-of-signal alarm output	Open-drain active-low signal asserting within 5 µs of input failure - enables system-level fault monitoring and failover control.
9, 12, 15–16, 18–24 (VDD, VDDO0–VDDO3, GND, RSVD_GND)	Power and ground terminals	Dedicated core (VDD) and four independent output buffer supplies (VDDO0–VDDO3) minimize crosstalk and support mixed-voltage outputs.
17, 19–22 (P1–P3, P5–P6)	Multi-function control inputs	Programmable for OEB (output enable), SSENB (spread spectrum), FS[1:0] (frequency plan select), or RESET - replaces discrete logic in clock management.

Key Features

Feature	Design Value
MultiSynth fractional synthesis	Guarantees 0 ppm frequency error across all four outputs - eliminates timing skew from multiple oscillators and enables precise multi-rate clocking (e.g., 100/125/156.25/250 MHz simultaneously).
Three pin-selectable configurations	One hardware footprint supports three distinct clock plans via FS[1:0] pins - reduces BOM count and simplifies field-upgradable timing schemes.
PCIe Gen 1–4 common clock compliance	Fully meets jitter, spread-spectrum, and protocol timing requirements for root complex and endpoint applications - validated per Intel Clock Jitter Tool v1.6.4.
Configurable output drivers	Each bank independently set to LVPECL, LVDS, HCSL, CMOS, SSTL, or HSTL - eliminates need for external level translators in heterogeneous interface designs.
Low-power operation	45 mA core current in clock generator mode; 12 mA in PLL-bypass buffer mode - reduces thermal load in power-constrained 1U servers and edge compute platforms.

Applications

PCI Express Gen 4 System Clocking	Ethernet Switch Timing
Use Scenario: Providing synchronized 100 MHz reference clocks to CPU, GPU, and NVMe controllers in a Gen4 x16 slot server motherboard. IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, spread-spectrum-enabled common clock compliant with PCIe Base Spec 4.0 rev 0.5. Use Value: Replaces three discrete oscillators and one buffer IC while meeting ≤0.45 ps RMS jitter requirement at 100 MHz output.	Use Scenario: Generating 156.25 MHz SerDes clocks and 25 MHz management clocks for a 32-port 10GbE switch ASIC. IC Role / Device Role / Timing Role: Configurable universal buffer and level translator supporting mixed LVDS (SerDes) and CMOS (management) outputs from one device. Use Value: Eliminates inter-board clock distribution skew and enables per-port clock enable/disable via P1–P6 programmable pins.
Broadcast Video Synchronization	DSLAM Line Card Timing
Use Scenario: Delivering genlock-accurate 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks to SDI transmitters in a 4K video encoder rack. IC Role / Device Role / Timing Role: Any-frequency clock generator synthesizing non-integer-related video rates using MultiSynth technology with <1 ps RMS jitter. Use Value: Achieves SMPTE ST 2082-1 jitter compliance (<0.2 UI) without external jitter cleaners or PLL cascading.	Use Scenario: Providing jitter-attenuated 70.656 MHz and 141.312 MHz clocks to ADSL2+/VDSL2 line drivers in a multi-port DSLAM shelf. IC Role / Device Role / Timing Role: Clock generator operating in 475 kHz loop bandwidth mode to suppress broadband noise per ITU-T G.992.5 Annex M. Use Value: Meets DSL random jitter spec (≤2.2 ps RMS, 10 Hz–30 MHz) without external VCXO or analog PLL components.

PCI Express Gen 4 System Clocking

Ethernet Switch Timing

Use Scenario: Providing synchronized 100 MHz reference clocks to CPU, GPU, and NVMe controllers in a Gen4 x16 slot server motherboard.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering low-jitter, spread-spectrum-enabled common clock compliant with PCIe Base Spec 4.0 rev 0.5.

Use Value: Replaces three discrete oscillators and one buffer IC while meeting ≤0.45 ps RMS jitter requirement at 100 MHz output.

Use Scenario: Generating 156.25 MHz SerDes clocks and 25 MHz management clocks for a 32-port 10GbE switch ASIC.

IC Role / Device Role / Timing Role: Configurable universal buffer and level translator supporting mixed LVDS (SerDes) and CMOS (management) outputs from one device.

Use Value: Eliminates inter-board clock distribution skew and enables per-port clock enable/disable via P1–P6 programmable pins.

Broadcast Video Synchronization

DSLAM Line Card Timing

Use Scenario: Delivering genlock-accurate 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks to SDI transmitters in a 4K video encoder rack.

IC Role / Device Role / Timing Role: Any-frequency clock generator synthesizing non-integer-related video rates using MultiSynth technology with <1 ps RMS jitter.

Use Value: Achieves SMPTE ST 2082-1 jitter compliance (<0.2 UI) without external jitter cleaners or PLL cascading.

Use Scenario: Providing jitter-attenuated 70.656 MHz and 141.312 MHz clocks to ADSL2+/VDSL2 line drivers in a multi-port DSLAM shelf.

IC Role / Device Role / Timing Role: Clock generator operating in 475 kHz loop bandwidth mode to suppress broadband noise per ITU-T G.992.5 Annex M.

Use Value: Meets DSL random jitter spec (≤2.2 ps RMS, 10 Hz–30 MHz) without external VCXO or analog PLL components.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D08581-GM	8-output, higher integration (integrated crystal option), lower typical jitter (0.45 ps RMS), but requires ClockBuilder Pro v2.x and longer lead time.	Targeted at new designs requiring >4 outputs or ultra-low jitter; not drop-in compatible due to different pinout and register map.	Select when consolidating >4 clocks with tighter jitter budgets; avoid for legacy SI5335 footprint replacement.
ICS8430I-01T	Quad LVDS output only, fixed 100/125/156.25/200 MHz outputs, no fractional synthesis, no programmable control pins.	Limited to fixed-frequency applications; lacks PCIe spread spectrum, LOS alarm, and multi-voltage support.	Choose only for cost-sensitive, static-clock-count systems where flexibility and compliance features are unnecessary.

Compared with SI5335D-B15677-GM, Si5332A-D08581-GM offers superior jitter and scalability but demands redesign, while ICS8430I-01T sacrifices configurability for simplicity - making SI5335D-B15677-GM the optimal balance of field-programmability, PCIe compliance, and pin-compatible upgrade path from legacy clock trees.

Availability

SI5335D-B15677-GM is available at Aetrix Electronics and suitable for PCIe Gen4 server motherboards, 10GbE switch line cards, broadcast video encoders, and DSLAM timing modules requiring stable component supply and long-term lifecycle support.

Supply support for SI5335D-B15677-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog ICs for infrastructure and mobility markets.

The SI5335 family was designed to replace multiple discrete clock sources with a single, web-configurable, any-frequency generator - targeting high-speed serial interface timing in datacenter, telecom, and broadcast equipment.

FAQ

What clock frequencies can SI5335D-B15677-GM generate?

SI5335D-B15677-GM synthesizes four independent output frequencies from 1 MHz to 350 MHz (LVPECL/LVDS/CML/SSTL/HSTL) or up to 250 MHz (HCSL) and 200 MHz (CMOS), with zero ppm frequency error using MultiSynth fractional division - enabling simultaneous generation of PCIe 100 MHz, 10GbE 156.25 MHz, and video 270 MHz clocks on one device.

Does SI5335D-B15677-GM support PCIe Gen4 common clock compliance?

Yes, SI5335D-B15677-GM is explicitly validated for PCIe Gen4 common clock compliance, delivering ≤0.45 ps RMS jitter (12 kHz–20 MHz) at 100 MHz output with 1.6 MHz loop bandwidth and integrated spread spectrum - meeting PCI-SIG Base Specification 4.0 rev 0.5 requirements without external filtering.

How many output formats does SI5335D-B15677-GM support per channel?

SI5335D-B15677-GM supports LVPECL, LVDS, CML, HCSL, CMOS, SSTL, and HSTL on each of its four output banks - with independent voltage selection (1.5/1.8/2.5/3.3 V) and format assignment - allowing mixed-interface clocking (e.g., LVDS for SerDes, CMOS for microcontrollers) from a single SI5335D-B15677-GM device.

Can SI5335D-B15677-GM operate without an external crystal?

Yes, SI5335D-B15677-GM accepts AC-coupled CMOS, SSTL, HSTL, or differential (LVDS/LVPECL/CML) reference inputs from 10–350 MHz - eliminating the need for an external crystal when a system-level clock is available; it also supports 25/27 MHz crystals directly on XA/XB pins with internal 18 pF load capacitance.

What is the function of the LOS pin on SI5335D-B15677-GM?

The LOS (Loss-of-Signal) pin on SI5335D-B15677-GM is an open-drain output that asserts low within 5 µs of detecting loss of valid input clock on XA/XB - providing real-time fault indication for system watchdogs or FPGA-based failover logic, and enabling robust clock monitoring without external comparators.

SI5335D-B15677-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: -

Type:: Clock Generator

PLL:: Yes with Bypass

Input:: CML, CMOS, HCSL, HSTL, LVDS, LVPECL, SSTL, Crystal

Output:: CML, HCSL, HSTL, LVCMOS, LVDS, LVPECL, SSTL

Number of Circuits:: 1

Ratio - Input:Output:: 1:4

Differential - Input:Output:: Yes/Yes

Frequency - Max:: 200MHz

Divider/Multiplier:: Yes/No

Voltage - Supply:: 1.71V ~ 1.98V, 2.25V ~ 2.75V, 2.97V ~ 3.63V

Operating Temperature:: -40°C ~ 85°C (TA)

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5335D-B15677-GM FAQ

1.How can I place an order for SI5335D-B15677-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5335D-B15677-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5335D-B15677-GM reliable?

The price and inventory of SI5335D-B15677-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5335D-B15677-GM is usually 5 days.

3.What payment methods are accepted for SI5335D-B15677-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5335D-B15677-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5335D-B15677-GM?

SI5335D-B15677-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5335D-B15677-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5335D-B15677-GM?

For technical support, including SI5335D-B15677-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5335D-B15677-GM requirements.

6.How does Aetrix verify that SI5335D-B15677-GM is sourced from the original manufacturer or authorized distributors?

All SI5335D-B15677-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5335D-B15677-GM meets industry standards.

7.What is the process for return or replacement of SI5335D-B15677-GM?

All SI5335D-B15677-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5335D-B15677-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5335D-B15677-GM part is unused and in its original packaging.

Return procedure for SI5335D-B15677-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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