Skyworks Solutions Inc. SI5338A-B01085-GM

Overview

SI5338A-B01085-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338A-B01085-GM datasheet, SI5338A-B01085-GM pinout, SI5338A-B01085-GM application, or SI5338A-B01085-GM equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ fractional synthesis resolution (1 ppb), spread-spectrum control (0.5–5.0% deviation), and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338A-B01085-GM implements a two-stage PLL architecture: a high-stability reference stage (input frequency range 5–710 MHz) followed by four independent MultiSynth™ synthesis blocks, each supporting integer or fractional-N division with <20 ps phase step accuracy and 1 ppm frequency increment/decrement. The device supports external feedback for zero-delay mode and includes loss-of-lock and loss-of-signal alarms.

Each of its four output drivers is fully independent-configurable for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, selectable output supply (VDDO0–VDDO3), and programmable initial phase offset (±45 ns). Input flexibility includes crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), and differential (5–710 MHz) references.

Key Specifications

Pinout & Package

SI5338A-B01085-GM is housed in a 4 × 4 mm, 24-lead QFN package with exposed thermal pad. Pin assignments are fixed per the Si5338 family: inputs (IN1–IN6), outputs (CLK0A/B through CLK3A/B), power (VDD, VDDO0–VDDO3), control (SCL, SDA, INTR, OEB), and reserved ground (RSVD_GND).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with Si5332A-D05189-GM and ICS85411AGI-01LF, the SI5338A-B01085-GM uniquely balances programmability, PCIe Gen 4 compliance, and industrial temperature support in a compact 24-QFN footprint-making it optimal for cost-sensitive, field-upgradable timing in networking and embedded systems where synthesis flexibility outweighs ultra-low jitter or deterministic latency requirements.

Availability

SI5338A-B01085-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, and broadcast video timing requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338A-B01085-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless infrastructure, automotive, industrial, and enterprise markets.

The Si5338 product line delivers highly configurable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-enabling consolidation of multiple timing sources into a single programmable IC.

FAQ

What is the maximum output frequency supported by the SI5338A-B01085-GM?

The SI5338A-B01085-GM supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. However, only two unique frequencies above 350 MHz can be generated simultaneously-specifically Fvco/4 and Fvco/6-as defined by the internal VCO architecture. All other outputs must remain ≤350 MHz.

Does the SI5338A-B01085-GM support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338A-B01085-GM is explicitly validated for PCIe Gen 4 Common Clock operation with 0.15–0.45 ps RMS jitter (10 kHz–50 MHz bandwidth), meeting the PCI-SIG Base Specification 4.0 rev. 0.5 requirements. This performance is achieved using its MultiSynth™ engine with PLL loop bandwidth set to 2–4 MHz and CDR = 10 MHz.

Can the SI5338A-B01085-GM generate different output voltages on each driver?

Yes, the SI5338A-B01085-GM provides independent output supply pins VDDO0 through VDDO3, each configurable for 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This allows simultaneous interfacing with mixed-voltage devices-for example, driving 1.8 V FPGA I/O banks and 3.3 V legacy peripherals from a single SI5338A-B01085-GM.

How is the SI5338A-B01085-GM programmed, and is configuration persistent?

The SI5338A-B01085-GM is programmed via I²C/SMBus interface using Skyworks' ClockBuilder Pro software. Configuration is stored in one-time-programmable (OTP) non-volatile memory, enabling immediate clock output on power-up without host intervention. Factory pre-programmed units ship with default settings valid within 2 ms of POR.

What input reference options does the SI5338A-B01085-GM support?

The SI5338A-B01085-GM accepts multiple reference types: external crystal (8–30 MHz), CMOS single-ended (5–200 MHz), SSTL/HSTL (5–350 MHz), and differential (5–710 MHz). Input pins IN1/IN2 and IN5/IN6 support AC-coupled differential clocks with internal 10 kΩ termination; IN3/IN4 accept DC-coupled single-ended signals with programmable threshold levels.