Skyworks Solutions Inc. SI5338A-B01225-GM

Overview

SI5338A-B01225-GM from Skyworks Solutions is a quad-output, I²C-programmable clock generator with MultiSynth™ frequency synthesis. It delivers four independent, any-frequency outputs (0.16–710 MHz), supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, achieves 0.7 ps RMS phase jitter, and operates from 1.8/2.5/3.3 V core supply in PCIe Gen 4–compliant timing systems.

For engineers reviewing the SI5338A-B01225-GM datasheet, SI5338A-B01225-GM pinout, SI5338A-B01225-GM application, or SI5338A-B01225-GM equivalent, key selection criteria include PCIe Gen 4 SRNS compliance, independent per-output voltage control (1.5–3.3 V), 20 ps phase step resolution, spread-spectrum modulation configurability, and 4×4 mm 24-QFN package integration for high-density FPGA/processor clocking.

Technical Context

The SI5338A-B01225-GM implements a two-stage PLL architecture: first-stage PLL locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), then feeds a MultiSynth™ fractional-N synthesizer per output channel. Each output path includes independent R-divider, M-divider, and P-divider configuration for precise frequency and phase control.

It supports both free-running synthesis and zero-delay buffer mode (PLL bypass), with loss-of-signal and loss-of-lock monitoring, programmable initial phase offset (±45 ns), and glitchless frequency increment/decrement via dedicated pins or I²C at 1 ppm steps - enabling dynamic clock tuning in live systems without interruption.

Key Specifications

Pinout & Package

The SI5338A-B01225-GM uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are fixed across Si5338 variants; this part shares the standard Si5338 pinout.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Compared with Si5338A-B01226-GM, the SI5338A-B01225-GM offers identical performance and pinout but ships with a distinct factory OTP configuration; compared with LMK04832RHAT, it provides lower power and smaller footprint at the expense of jitter cleaning capability and JESD204B support.

Availability

SI5338A-B01225-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch synchronization, broadcast video frame sync, and FPGA-based signal processing requiring stable component supply and long-term industrial availability.

Supply support for SI5338A-B01225-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog products.

The Si5338 product line delivers highly configurable, low-jitter clock generation for high-speed digital systems - designed specifically for replacing multiple oscillators in networking, computing, and communications infrastructure where flexibility, density, and jitter performance are critical.

FAQ

What is the default factory configuration of the SI5338A-B01225-GM?

The SI5338A-B01225-GM ships with a specific OTP (one-time programmable) configuration stored in on-chip NVM, defining its initial output frequencies, formats, and voltage settings. This configuration is unique to the -B01225 variant and differs from other Si5338A part numbers like -B01226-GM. The SI5338A-B01225-GM can be fully reprogrammed via I²C using ClockBuilder Pro software after power-up.

Does the SI5338A-B01225-GM support PCIe Gen 4 Common Clock and SRNS modes?

Yes, the SI5338A-B01225-GM meets PCIe Gen 4 Common Clock jitter requirements (≤0.45 ps RMS) and PCIe Gen 3 Separate Reference No Spread (SRNS) specifications (≤0.32 ps RMS) when configured per Skyworks AN562 guidelines. Its low 0.7 ps RMS typical phase jitter and programmable PLL bandwidth (1.6–4 MHz) enable compliance across PCIe generations without external filtering.

Can the SI5338A-B01225-GM generate four different output frequencies simultaneously?

Yes, the SI5338A-B01225-GM synthesizes four independent output frequencies simultaneously - each configurable from 0.16 MHz to 710 MHz with zero ppm error using MultiSynth™ technology. Outputs may differ in frequency, format (LVPECL/LVDS/HCSL/CMOS), voltage (1.5–3.3 V), and phase offset, enabling full system clock tree integration in a single 4×4 mm QFN package.

What input reference options does the SI5338A-B01225-GM support?

The SI5338A-B01225-GM accepts six input reference types: 8–30 MHz crystal (differential), 5–200 MHz CMOS, 5–350 MHz SSTL or HSTL, and 5–710 MHz differential (LVDS/LVPECL/CML). Input selection is programmable per channel, allowing flexible system-level clock sourcing - for example, using a 25 MHz crystal for primary lock and a 156.25 MHz Ethernet reference as backup.

Is ClockBuilder Pro software required to configure the SI5338A-B01225-GM?

ClockBuilder Pro is strongly recommended but not strictly required to configure the SI5338A-B01225-GM. The device supports full I²C register-level programming; however, ClockBuilder Pro automates complex MultiSynth™ calculations, validates configuration feasibility, generates initialization scripts, and exports to hardware platforms. Using it avoids manual register errors and ensures optimal jitter performance for the SI5338A-B01225-GM's target application.