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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338A-B01225-GMR

Name: SI5338A-B01225-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338A-B01225-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338A-B01225-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338A-B01225-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338A-B01225-GMR from Skyworks Solutions is an I²C-programmable quad clock generator IC with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338A-B01225-GMR datasheet, SI5338A-B01225-GMR pinout, SI5338A-B01225-GMR application, or SI5338A-B01225-GMR equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ fractional synthesis resolution (1 ppb), spread-spectrum control (0.5–5.0% deviation), and loss-of-lock/loss-of-signal alarm support.

Technical Context

The SI5338A-B01225-GMR implements a two-stage PLL architecture: a high-stability reference stage (input frequency range 5–710 MHz) followed by four independent MultiSynth™ synthesis blocks, each driving one output pair. Each MultiSynth supports integer or fractional-N division with programmable initial phase offset (±45 ns) and glitchless frequency increment/decrement in 1 ppm steps.

Output drivers are fully configurable per channel for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats across 0.16–710 MHz, with independent VDDO supplies (1.4–3.63 V) and on-chip termination. The device supports external feedback for zero-delay mode and includes dedicated INTR pin for status reporting of lock and signal integrity faults.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 4 common clock spec (≤0.45 ps RMS)
Output Count & Type	4 differential output pairs (CLK0A/B to CLK3A/B); supports up to 8 single-ended or mixed-mode outputs
Frequency Range	0.16–710 MHz per output; LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz
Synthesis Resolution	1 ppb frequency step size; enables true zero-ppm accuracy on all outputs via fractional-N MultiSynth™
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: 1.5/1.8/2.5/3.3 V selectable per driver
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture sensitivity level 3
Operating Temp	–40 °C to +85 °C ambient; validated for industrial and telecom line card environments

Pinout & Package

SI5338A-B01225-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow Skyworks' standard Si5338 pinout: inputs IN1–IN6 (differential and single-ended reference support), outputs CLK0A/B through CLK3A/B, four independent VDDOx supplies, SCL/SDA/I²C interface, INTR alarm output, and dedicated ground/pad connections.

Pin/Terminal	Circuit Role	Design Meaning
IN1/IN2, IN5/IN6	Differential Reference Inputs	Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination
IN3/IN4	Single-Ended Reference Inputs	Support 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL; internal 20 kΩ pull-up/down configurable
CLK0A/CLK0B – CLK3A/CLK3B	Differential Output Pairs	Four independent output drivers; each supports LVPECL/LVDS/HCSL/CML with programmable swing and common-mode voltage
VDDO0–VDDO3	Output Buffer Supplies	Independent 1.4–3.63 V supplies per output bank; enable mixed-voltage system interfacing
SCL/SDA	I²C Serial Interface	Standard-mode (100 kHz) and fast-mode (400 kHz) compatible; supports ClockBuilder Pro configuration
INTR	Interrupt Output	Open-drain status pin asserting on loss-of-lock or loss-of-signal; requires external pull-up

Key Features

Feature	Design Value
MultiSynth™ Synthesis	Four independent fractional-N synthesizers enabling any-frequency generation (0.16–710 MHz) with 1 ppb resolution and zero ppm error
PCIe Gen 4 Compliance	Validated RMS jitter ≤0.45 ps (10 kHz–50 MHz) in common clock mode; supports Gen 1/2/3/4 and Gen 3 SRNS
Configurable Spread Spectrum	Per-output SSC with adjustable deviation (0.5–5.0%), modulation rate (33–63 kHz), and direction (up/down/center)
Glitchless Frequency Tuning	Hardware pin-controlled frequency increment/decrement in 1 ppm steps without output interruption or phase discontinuity
Programmable Phase Offset	Independent ±45 ns phase adjustment per output with <20 ps step accuracy for skew management in multi-lane interfaces

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch/Routing
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a 1U data center switch chassis. IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter (≤0.45 ps RMS) HCSL clocks, each independently configured for lane-group alignment. Use Value: Eliminates need for four discrete oscillators; reduces board area by 65% and enables per-lane phase tuning to meet PCIe Gen 4 inter-lane skew limits (<15 ps).	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1G/10G/25G Ethernet PHYs and MACs in a carrier-grade router line card. IC Role / Device Role / Timing Role: Any-frequency clock synthesizer replacing crystal oscillators and fanout buffers while supporting IEEE 802.3bj jitter requirements. Use Value: Single-device solution achieves <0.7 ps RMS jitter across all outputs; independent VDDO supplies allow direct interfacing to mixed-voltage PHYs (1.8 V/2.5 V/3.3 V).
Broadcast Video Timing	FPGA Processor Clocking
Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 742.5 MHz and ST 2081 (6G-SDI) 594 MHz clocks to serializer/deserializer ICs in broadcast camera backends. IC Role / Device Role / Timing Role: High-frequency differential clock generator using LVPECL outputs with programmable common-mode voltage for 75 Ω coaxial drive. Use Value: Supports >710 MHz outputs via Fvco/4 and Fvco/6 modes; 0.7 ps RMS jitter ensures compliance with SMPTE RP 184 eye diagram mask.	Use Scenario: Supplying 500 MHz system clock, 250 MHz DDR4 memory clock, 100 MHz configuration clock, and 10 MHz debug clock to Xilinx Versal ACAP in a radar processing module. IC Role / Device Role / Timing Role: Configurable quad clock source with independent format selection (LVDS for DDR4, CMOS for config logic, HCSL for high-speed SerDes). Use Value: Reduces BOM count by consolidating four timing sources; programmable phase offsets align memory read/write strobes to within 20 ps.

PCIe Gen 4 Switch Timing

Ethernet Switch/Routing

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 switch ASICs in a 1U data center switch chassis.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering four low-jitter (≤0.45 ps RMS) HCSL clocks, each independently configured for lane-group alignment.

Use Value: Eliminates need for four discrete oscillators; reduces board area by 65% and enables per-lane phase tuning to meet PCIe Gen 4 inter-lane skew limits (<15 ps).

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1G/10G/25G Ethernet PHYs and MACs in a carrier-grade router line card.

IC Role / Device Role / Timing Role: Any-frequency clock synthesizer replacing crystal oscillators and fanout buffers while supporting IEEE 802.3bj jitter requirements.

Use Value: Single-device solution achieves <0.7 ps RMS jitter across all outputs; independent VDDO supplies allow direct interfacing to mixed-voltage PHYs (1.8 V/2.5 V/3.3 V).

Broadcast Video Timing

FPGA Processor Clocking

Use Scenario: Delivering SMPTE ST 2082 (12G-SDI) 742.5 MHz and ST 2081 (6G-SDI) 594 MHz clocks to serializer/deserializer ICs in broadcast camera backends.

IC Role / Device Role / Timing Role: High-frequency differential clock generator using LVPECL outputs with programmable common-mode voltage for 75 Ω coaxial drive.

Use Value: Supports >710 MHz outputs via Fvco/4 and Fvco/6 modes; 0.7 ps RMS jitter ensures compliance with SMPTE RP 184 eye diagram mask.

Use Scenario: Supplying 500 MHz system clock, 250 MHz DDR4 memory clock, 100 MHz configuration clock, and 10 MHz debug clock to Xilinx Versal ACAP in a radar processing module.

IC Role / Device Role / Timing Role: Configurable quad clock source with independent format selection (LVDS for DDR4, CMOS for config logic, HCSL for high-speed SerDes).

Use Value: Reduces BOM count by consolidating four timing sources; programmable phase offsets align memory read/write strobes to within 20 ps.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05899-GM	Higher integration: 8 outputs, integrated EEPROM, lower jitter (0.35 ps RMS), but larger 32-QFN (5 × 5 mm) package	Targeted at multi-ASIC systems requiring >4 outputs or factory pre-programming; not drop-in compatible due to pin count and footprint	Select when needing ≥8 outputs or embedded configuration storage; SI5338A-B01225-GMR remains optimal for cost-sensitive 4-output designs with PCB space constraints.
ICS8430I-01T	Fixed-frequency quad LVDS generator (no I²C programming); 1.2 ps RMS jitter; 3.3 V only; no spread spectrum or phase tuning	Suitable only for static clock trees where frequencies never change; lacks PCIe Gen 4 compliance and dynamic reconfiguration capability	Choose only for legacy systems with unchanging clock requirements and no need for jitter optimization or firmware updates.

Compared with Si5332A-D05899-GM and ICS8430I-01T, the SI5338A-B01225-GMR uniquely balances programmability, PCIe Gen 4 compliance, compact 24-QFN packaging, and per-output voltage/format flexibility-making it the preferred choice for new designs requiring field-upgradable, multi-standard timing in space-constrained platforms.

Availability

SI5338A-B01225-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, and broadcast video equipment requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338A-B01225-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with over 30 years of RF and clock technology expertise.

The Si5338 family was designed specifically for high-performance, multi-protocol serial interface timing-including PCIe, Ethernet, Fibre Channel, and broadcast video-where low jitter, flexible output configuration, and software-defined frequency agility are critical.

FAQ

What is the maximum output frequency supported by the SI5338A-B01225-GMR in LVPECL mode?

The SI5338A-B01225-GMR supports LVPECL outputs up to 710 MHz, achieved using Fvco/4 and Fvco/6 synthesis modes. This capability enables direct clocking of 12G-SDI serializers and high-speed SerDes lanes without external frequency multiplication. Operation above 350 MHz is limited to two unique frequencies simultaneously per device.

Does the SI5338A-B01225-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, the SI5338A-B01225-GMR is compliant with PCIe Gen 4 SRNS requirements, delivering ≤0.32 ps RMS jitter (10 kHz–50 MHz) when configured with PLL bandwidth of 2–4 MHz and CDR = 10 MHz. This is validated per PCI Express Base Specification 4.0 rev. 0.5 and measured using the Skyworks PCIe Clock Jitter Tool.

Can the SI5338A-B01225-GMR generate different output voltages on each of its four output banks?

Yes, the SI5338A-B01225-GMR provides independent VDDO0–VDDO3 supplies, allowing each output bank to be powered at 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables direct interfacing with mixed-voltage ASICs, FPGAs, and PHYs without level-shifting components-e.g., LVDS at 1.8 V for memory controllers and HCSL at 3.3 V for PCIe switches.

How is the SI5338A-B01225-GMR programmed, and is external nonvolatile memory required?

The SI5338A-B01225-GMR is programmed via its I²C/SMBus-compatible interface using Skyworks' ClockBuilder Pro software. It contains on-chip OTP NVM that stores configuration; no external EEPROM is needed. Factory programming or field updates are supported, and the device powers up with stored settings within 2 ms after POR.

What input reference frequencies does the SI5338A-B01225-GMR accept?

The SI5338A-B01225-GMR accepts multiple reference types: external crystals (8–30 MHz), CMOS inputs (5–200 MHz), SSTL/HSTL inputs (5–350 MHz), and differential inputs (5–710 MHz). Input flexibility allows use with legacy oscillators, FPGA clocks, or high-speed SerDes recovered clocks-enabling reuse of existing timing infrastructure.

SI5338A-B01225-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338A-B01225-GMR FAQ

1.How can I place an order for SI5338A-B01225-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338A-B01225-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338A-B01225-GMR reliable?

The price and inventory of SI5338A-B01225-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338A-B01225-GMR is usually 5 days.

3.What payment methods are accepted for SI5338A-B01225-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338A-B01225-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338A-B01225-GMR?

SI5338A-B01225-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338A-B01225-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338A-B01225-GMR?

For technical support, including SI5338A-B01225-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338A-B01225-GMR requirements.

6.How does Aetrix verify that SI5338A-B01225-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338A-B01225-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338A-B01225-GMR meets industry standards.

7.What is the process for return or replacement of SI5338A-B01225-GMR?

All SI5338A-B01225-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338A-B01225-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338A-B01225-GMR part is unused and in its original packaging.

Return procedure for SI5338A-B01225-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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