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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338A-B01604-GMR

Name: SI5338A-B01604-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338A-B01604-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338A-B01604-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338A-B01604-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338A-B01604-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 and SRNS compliance, and MultiSynth™ frequency synthesis supporting 0.16–710 MHz output ranges. It replaces up to four crystal oscillators in high-speed networking and FPGA timing applications.

For engineers reviewing the SI5338A-B01604-GMR datasheet, SI5338A-B01604-GMR pinout, SI5338A-B01604-GMR application, or SI5338A-B01604-GMR equivalent, key selection criteria include its 24-QFN package, independent per-output voltage (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and I²C/SMBus programmability for any-frequency synthesis.

Technical Context

The SI5338A-B01604-GMR implements a two-stage PLL architecture: a high-performance integer-N PLL (Stage 1) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output. This enables true zero-ppm accuracy across all four clocks without shared dividers.

Each output driver supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with independent supply voltage selection (VDDO0–VDDO3), programmable phase offset (±45 ns, <20 ps step), and glitchless frequency increment/decrement (1 ppm steps). Input reference flexibility includes 8–30 MHz crystals or 5–710 MHz differential signals.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 3/4 common clock and SRNS requirements for high-speed serial links
Output Frequency Range	0.16–710 MHz - covers Ethernet (125/156.25 MHz), PCIe (100 MHz), Fibre Channel (1.0625 GHz via Fvco/4), and processor clocks
Input Reference Support	8–30 MHz crystal or 5–710 MHz differential - enables direct replacement of multiple XO sources with one flexible input
Supply Voltages	VDD = 1.8/2.5/3.3 V; VDDOx = 1.5/1.8/2.5/3.3 V - allows mixed-voltage system clocking without level shifters
Package	24-pin QFN, 4 × 4 mm - space-constrained PCBs benefit from compact footprint and thermal resistance θJA = 37 °C/W
Operating Temperature	–40 to +85 °C - qualified for industrial and telecom line card environments
I²C Interface	Standard-mode (100 kHz) and fast-mode (400 kHz) - enables configuration via microcontroller without dedicated programming hardware

Pinout & Package

SI5338A-B01604-GMR uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.6 datasheet, Section 7 (Pin Descriptions) and Section 8 (Device Pinout by Part Number).

Pin/Terminal	Circuit Role	Design Meaning
IN1/IN2, IN5/IN6	Differential input pairs	Accept 5–710 MHz AC-coupled differential clocks; require external 100 Ω termination
IN3/IN4	Single-ended input pins	Support 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL with internal biasing
CLK0A/CLK0B – CLK3A/CLK3B	Differential output pairs	Four independent outputs; each pair configurable as LVPECL/LVDS/HCSL/CML with per-driver VDDO
VDDO0–VDDO3	Output buffer supplies	Enable independent voltage setting per output (1.5/1.8/2.5/3.3 V) for mixed-interface systems
SCL/SDA	I²C interface	Standard bidirectional bus for register configuration and status readback; supports SMBus alerts
INTR	Interrupt output	Open-drain signal indicating loss-of-lock or loss-of-signal events; requires external pull-up

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers enable simultaneous generation of unrelated frequencies (e.g., 125 MHz + 156.25 MHz + 100 MHz + 200 MHz) with zero ppm error
PCIe Gen 4 Common Clock compliance	0.15–0.45 ps RMS jitter (10 kHz–50 MHz) ensures reliable SerDes lock and BER performance in Gen 4 endpoints
Independent phase adjustment	±45 ns range with <20 ps resolution allows precise skew control between CPU, memory, and I/O clocks
Spread spectrum modulation	Configurable 0.5–5.0% down-spread at 33–63 kHz reduces EMI peak emissions without affecting timing margins
External feedback mode	Enables zero-delay operation for clock forwarding applications where input-to-output propagation delay must be minimized

Applications

PCIe Gen 4 Switch Timing	Ethernet Switch Synchronization
Use Scenario: 32-lane PCIe Gen 4 switch IC requiring four low-jitter reference clocks for upstream/downstream ports and management controller. IC Role / Device Role / Timing Role: Quad clock generator providing 100 MHz PCIe common clock, 100 MHz SRNS clock, 125 MHz management clock, and 156.25 MHz auxiliary clock-all simultaneously synthesized from one crystal. Use Value: Eliminates four discrete XOs, reduces BOM count and board area, and guarantees inter-clock skew <100 ps for deterministic link training.	Use Scenario: 10 GbE/25 GbE Ethernet switch ASIC needing synchronized clocks for MAC, PHY, and packet buffer interfaces. IC Role / Device Role / Timing Role: Generates 156.25 MHz (10GBase-R), 312.5 MHz (25GBase-R), 125 MHz (management), and 250 MHz (DDR interface) from a single 25 MHz crystal reference. Use Value: Achieves sub-1 ps RMS jitter on all outputs, meeting IEEE 802.3bj jitter budgets while enabling single-reference design simplification.
FPGA-Based Video Processing	Telecom Line Card Clocking
Use Scenario: Broadcast video encoder FPGA processing 4K60 YUV422 streams with separate pixel, AXI, DDR, and HDMI TMDS clocks. IC Role / Device Role / Timing Role: Supplies 148.5 MHz (HDMI), 200 MHz (AXI), 400 MHz (DDR), and 27 MHz (legacy sync) with independent format selection (LVDS, HCSL, CMOS). Use Value: Per-output voltage control (1.8 V for LVDS, 3.3 V for CMOS) eliminates external level shifters and reduces power delivery complexity.	Use Scenario: OTN/SONET line card with OC-192/STM-64 framer, DSP, and SerDes requiring synchronous 155.52 MHz, 622.08 MHz, 1.244 Gbps, and 100 MHz clocks. IC Role / Device Role / Timing Role: Synthesizes OC-12-compliant 155.52 MHz (0.7 ps RMS jitter), 622.08 MHz (Fvco/4), 100 MHz (SRNS), and 125 MHz (Ethernet) from a 19.44 MHz crystal. Use Value: Meets Telcordia GR-1244-CORE jitter specs while consolidating timing resources into one programmable device.

PCIe Gen 4 Switch Timing

Ethernet Switch Synchronization

Use Scenario: 32-lane PCIe Gen 4 switch IC requiring four low-jitter reference clocks for upstream/downstream ports and management controller.

IC Role / Device Role / Timing Role: Quad clock generator providing 100 MHz PCIe common clock, 100 MHz SRNS clock, 125 MHz management clock, and 156.25 MHz auxiliary clock-all simultaneously synthesized from one crystal.

Use Value: Eliminates four discrete XOs, reduces BOM count and board area, and guarantees inter-clock skew <100 ps for deterministic link training.

Use Scenario: 10 GbE/25 GbE Ethernet switch ASIC needing synchronized clocks for MAC, PHY, and packet buffer interfaces.

IC Role / Device Role / Timing Role: Generates 156.25 MHz (10GBase-R), 312.5 MHz (25GBase-R), 125 MHz (management), and 250 MHz (DDR interface) from a single 25 MHz crystal reference.

Use Value: Achieves sub-1 ps RMS jitter on all outputs, meeting IEEE 802.3bj jitter budgets while enabling single-reference design simplification.

FPGA-Based Video Processing

Telecom Line Card Clocking

Use Scenario: Broadcast video encoder FPGA processing 4K60 YUV422 streams with separate pixel, AXI, DDR, and HDMI TMDS clocks.

IC Role / Device Role / Timing Role: Supplies 148.5 MHz (HDMI), 200 MHz (AXI), 400 MHz (DDR), and 27 MHz (legacy sync) with independent format selection (LVDS, HCSL, CMOS).

Use Value: Per-output voltage control (1.8 V for LVDS, 3.3 V for CMOS) eliminates external level shifters and reduces power delivery complexity.

Use Scenario: OTN/SONET line card with OC-192/STM-64 framer, DSP, and SerDes requiring synchronous 155.52 MHz, 622.08 MHz, 1.244 Gbps, and 100 MHz clocks.

IC Role / Device Role / Timing Role: Synthesizes OC-12-compliant 155.52 MHz (0.7 ps RMS jitter), 622.08 MHz (Fvco/4), 100 MHz (SRNS), and 125 MHz (Ethernet) from a 19.44 MHz crystal.

Use Value: Meets Telcordia GR-1244-CORE jitter specs while consolidating timing resources into one programmable device.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D08589-GM	Higher integration: integrates crystal; supports up to 12 outputs; lower jitter (0.35 ps RMS); requires different programming flow	Better suited for new designs prioritizing ultra-low jitter and reduced external components; not drop-in compatible due to pinout and register map differences	Select when replacing crystal + clock generator combos and jitter budget is <0.4 ps RMS
ICS853S02IAGLF	Fixed-frequency, non-programmable; 2-output LVDS; 1.2 ps RMS jitter; no I²C interface; simpler power sequencing	Limited to static clock trees; cannot synthesize arbitrary frequencies or support dynamic reconfiguration	Select only for cost-sensitive, fixed-frequency applications where programmability is unnecessary

Compared with Si5332A-D08589-GM and ICS853S02IAGLF, the SI5338A-B01604-GMR uniquely balances field-programmability, PCIe Gen 4 compliance, and 4-output flexibility in a 4×4 mm QFN-making it optimal for upgrade paths from multi-XO designs where firmware-controlled frequency agility is required.

Availability

SI5338A-B01604-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch synchronization, FPGA-based video processing, and telecom line card clocking requiring stable component supply and long-term lifecycle support.

Supply support for SI5338A-B01604-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.

The SI5338 family is designed for high-performance, multi-protocol timing in datacenter, networking, and communications infrastructure-enabling consolidation of discrete oscillators into a single programmable clock source with industry-leading jitter performance.

FAQ

What is the primary function of the SI5338A-B01604-GMR in a PCIe Gen 4 system?

The SI5338A-B01604-GMR serves as a common clock generator delivering four precisely aligned, low-jitter reference clocks-including 100 MHz PCIe common clock and 100 MHz SRNS clock-to meet PCI-SIG Gen 4 jitter specifications (0.15–0.45 ps RMS). Its MultiSynth™ architecture ensures zero ppm frequency error across all outputs, critical for reliable link training and stable SerDes operation in switches and endpoint devices.

Does the SI5338A-B01604-GMR support spread-spectrum clocking, and how is it configured?

Yes, the SI5338A-B01604-GMR supports highly configurable spread-spectrum clocking on any output, with programmable spread (0.5–5.0% down-spread), modulation rate (33–63 kHz), and center frequency (5–350 MHz). Configuration is performed via I²C registers using ClockBuilder Pro software or custom firmware-no external components are required, and SSC can be enabled/disabled dynamically during operation.

Can the SI5338A-B01604-GMR generate four completely independent frequencies simultaneously?

Yes, the SI5338A-B01604-GMR uses four independent MultiSynth™ fractional-N synthesizers, allowing simultaneous generation of four unrelated frequencies (e.g., 125 MHz, 156.25 MHz, 100 MHz, and 200 MHz) with true zero ppm accuracy. Each output is fully decoupled in frequency, phase, and format-no shared dividers or PLL constraints limit output combinations.

What input reference options does the SI5338A-B01604-GMR support?

The SI5338A-B01604-GMR supports six input reference types: 8–30 MHz fundamental-mode crystals (with on-chip load capacitance tuning), 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, and 5–710 MHz differential (LVDS/LVPECL/CML). All inputs are routed to the same PLL stage, enabling seamless fallback or redundancy between reference sources without hardware changes.

How is the SI5338A-B01604-GMR programmed, and is external non-volatile memory required?

The SI5338A-B01604-GMR is programmed via its I²C/SMBus interface using Skyworks' ClockBuilder Pro software, which generates configuration files and writes them directly to the device's on-chip OTP NVM. No external EEPROM or flash is required-the part boots autonomously with pre-programmed settings, and field updates are supported via I²C without power cycle.

SI5338A-B01604-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338A-B01604-GMR FAQ

1.How can I place an order for SI5338A-B01604-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338A-B01604-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338A-B01604-GMR reliable?

The price and inventory of SI5338A-B01604-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338A-B01604-GMR is usually 5 days.

3.What payment methods are accepted for SI5338A-B01604-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338A-B01604-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338A-B01604-GMR?

SI5338A-B01604-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338A-B01604-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338A-B01604-GMR?

For technical support, including SI5338A-B01604-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338A-B01604-GMR requirements.

6.How does Aetrix verify that SI5338A-B01604-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338A-B01604-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338A-B01604-GMR meets industry standards.

7.What is the process for return or replacement of SI5338A-B01604-GMR?

All SI5338A-B01604-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338A-B01604-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338A-B01604-GMR part is unused and in its original packaging.

Return procedure for SI5338A-B01604-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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