Skyworks Solutions Inc. SI5338A-B04149-GMR

Overview

SI5338A-B04149-GMR from Skyworks Solutions is an I²C-programmable quad clock generator IC with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338A-B04149-GMR datasheet, SI5338A-B04149-GMR pinout, SI5338A-B04149-GMR application, or SI5338A-B04149-GMR equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ fractional synthesis resolution (1 ppb), spread-spectrum control (0.5–5.0% spread, 33–63 kHz modulation), and loss-of-lock/loss-of-signal alarm support.

Technical Context

The SI5338A-B04149-GMR implements a two-stage PLL architecture: a high-stability reference stage (VCO-based) followed by four independent MultiSynth™ fractional-N synthesis blocks, each driving a configurable output buffer. Input flexibility includes external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references.

Each output supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with independent voltage selection (1.5–3.3 V), programmable phase offset (±45 ns, <20 ps step), and glitchless frequency increment/decrement (1 ppm steps). External feedback mode enables zero-delay operation, while INTR pin provides loss-of-lock and loss-of-signal status reporting.

Key Specifications

Pinout & Package

SI5338A-B04149-GMR uses a 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.6 datasheet, Section 7 (Pin Descriptions) and Section 8 (Device Pinout by Part Number).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with Si5338A-B04150-GMR, SI5338A-B04149-GMR offers identical electrical performance but distinct factory configuration; versus Si5332AC-D07189-GM, it trades output count and jitter for smaller footprint and lower cost-ideal for space-constrained PCIe/switch designs where four clocks suffice.

Availability

SI5338A-B04149-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, and broadcast video timing applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338A-B04149-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, and broadcast video-enabling flexible, compact, and reliable timing architectures in next-generation systems.

FAQ

What is the maximum output frequency supported by the SI5338A-B04149-GMR?

The SI5338A-B04149-GMR supports up to 710 MHz on LVPECL/LVDS/CML outputs, 350 MHz on SSTL/HSTL, 250 MHz on HCSL, and 200 MHz on CMOS. Only two unique frequencies above 350 MHz can be simultaneously generated (Fvco/4 and Fvco/6), as specified in Skyworks Rev. 1.6 datasheet Table 6.

Does the SI5338A-B04149-GMR support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338A-B04149-GMR meets PCIe Gen 4 Common Clock jitter requirements per Base Specification 4.0 rev. 0.5, delivering 0.15–0.45 ps RMS jitter (10 kHz–50 MHz band) with PLL bandwidth set to 2–4 MHz and CDR at 10 MHz, as verified in Table 12 of the Skyworks datasheet.

How many independent output supply voltages does the SI5338A-B04149-GMR support?

The SI5338A-B04149-GMR supports four independent output buffer supply voltages (VDDO0–VDDO3), each configurable from 1.4 V to 3.63 V. This allows direct interfacing with mixed-voltage devices such as 1.8 V LVDS SerDes, 2.5 V HSTL FPGAs, and 3.3 V microcontrollers without external level shifters.

Can the SI5338A-B04149-GMR operate in clock buffer (PLL bypass) mode?

Yes, the SI5338A-B04149-GMR supports clock buffer mode with additive phase jitter as low as 0.165 ps RMS (12 kHz–20 MHz) and propagation delay of 2.5–4 ns. In this mode, the PLL is bypassed and input clocks pass directly to outputs, preserving input jitter characteristics while enabling deterministic latency.

What is the function of the INTR pin on the SI5338A-B04149-GMR?

The INTR pin on the SI5338A-B04149-GMR is an open-drain interrupt output that asserts low during loss-of-lock (LOL) or loss-of-signal (LOS) conditions. It sinks up to 3 mA and is used by host systems for real-time fault monitoring and failover triggering without requiring polling of I²C registers.