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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338A-B04362-GM

Name: SI5338A-B04362-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338A-B04362-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338A-B04362-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338A-B04362-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338A-B04362-GM from Skyworks Solutions is an I²C-programmable quad clock generator IC with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in Ethernet switch/router, processor/FPGA clocking, and PCIe timing systems.

For engineers reviewing the SI5338A-B04362-GM datasheet, SI5338A-B04362-GM pinout, SI5338A-B04362-GM application, or SI5338A-B04362-GM equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis (0.16–710 MHz per output), independent output voltage support (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% down-spread), and I²C/SMBus programmability with ClockBuilder Pro software integration.

Technical Context

The SI5338A-B04362-GM implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) feeding a fractional-N MultiSynth™ synthesis stage per output. Each of the four outputs uses dedicated M/N/P dividers and supports integer or fractional frequency synthesis with <20 ps phase step resolution.

It features independent output driver configuration (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), per-output supply voltage control (VDDO0–VDDO3), loss-of-lock and loss-of-signal alarms, and glitchless frequency increment/decrement via pin or I²C control in 1 ppm steps - enabling dynamic clock tuning without system interruption.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3/4 and GbE jitter requirements
Output Frequency Range	0.16–710 MHz per channel; supports LVPECL/LVDS (≤710 MHz), HCSL (≤250 MHz), CMOS (≤200 MHz)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V per driver
Package & Pins	24-pin QFN, 4 × 4 mm; 4 differential clock outputs (CLK0A/B–CLK3A/B), 6 input pins (IN1–IN6), I²C interface (SCL/SDA), INTR alarm
Temperature Range	–40 to +85 °C ambient; qualified for industrial and telecom line card deployment
PCIe Compliance	Gen 1/2/3/4 Common Clock mode; Gen 3 SRNS compliant; supports CDR lock at 10 MHz

Pinout & Package

SI5338A-B04362-GM is housed in a thermally enhanced 24-lead QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin 1 is top-left corner (IN1), and pin 24 is bottom-right (GND). The package supports reflow soldering per JEDEC J-STD-020 (peak 260 °C).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2, IN5, IN6	Differential clock inputs	Accept AC-coupled differential references up to 710 MHz; require external 100 Ω termination
IN3, IN4	Single-ended clock inputs	Support CMOS/SSTL/HSTL signals (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A–CLK3B	Differential clock outputs	Four independent pairs; each configurable as LVPECL/LVDS/HCSL/CML with per-driver VDDO
VDDO0–VDDO3	Output buffer supplies	Independent 1.5/1.8/2.5/3.3 V rails per output pair; enable mixed-voltage system interfacing
SCL, SDA	I²C/SMBus interface	Standard 100/400 kHz operation; supports ClockBuilder Pro programming and runtime configuration
INTR	Interrupt output	Open-drain status flag for loss-of-lock or loss-of-signal events; pulled up externally

Key Features

Feature	Design Value
MultiSynth™ synthesis	Enables true zero-ppm accuracy on all four outputs with independent fractional-N dividers
Glitchless frequency tuning	1 ppm step size via PINC/FINC pins or I²C; no output interruption during dynamic adjustment
Programmable phase offset	±45 ns range per output with <20 ps step resolution for precise skew alignment
Spread spectrum clocking	Configurable down-spread (0.5–5.0%) and modulation rate (33–63 kHz) on any output
Zero-delay mode	Enabled via external feedback path; eliminates propagation delay between input and selected output

Applications

PCIe Gen 4 Timing	Ethernet Switch Clocking
Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and root complexes in server backplanes. IC Role / Device Role / Timing Role: Quad-output common clock generator with Gen 4 SRNS-compliant jitter performance and independent output enable control. Use Value: Meets PCIe Gen 4 total jitter limit of ≤33.6 ps pk-pk while eliminating need for four discrete oscillators and reducing board area by >60%.	Use Scenario: Delivering 125 MHz, 156.25 MHz, and 312.5 MHz clocks to SerDes lanes, MACs, and PHYs in 1/10 GbE switches. IC Role / Device Role / Timing Role: Any-frequency synthesizer supporting mixed-rate Ethernet interfaces with low additive jitter (<0.7 ps RMS). Use Value: Enables single-device clock tree for multi-speed Ethernet ports, reducing BOM count and simplifying layout versus discrete oscillator + fanout buffer solutions.
FPGA Processor Clocking	Broadcast Video Timing
Use Scenario: Generating core logic, transceiver, and DDR memory clocks for Xilinx Versal or Intel Agilex FPGAs in broadcast infrastructure. IC Role / Device Role / Timing Role: Configurable quad clock source with independent voltage and format per output (e.g., LVDS for FPGA banks, HCSL for SerDes). Use Value: Supports simultaneous 100 MHz (core), 500 MHz (transceiver), 800 MHz (DDR4), and 27 MHz (video) outputs from one IC - eliminating timing skew between domains.	Use Scenario: Synchronizing SDI, HDMI, and audio sample clocks across video processing pipelines in broadcast encoders and routers. IC Role / Device Role / Timing Role: Precision clock generator with sub-20 ps phase step resolution for frame-accurate genlock and lip-sync alignment. Use Value: Achieves <±1 ppm frequency accuracy and <100 ps output-to-output skew - critical for SMPTE ST 2059-2 PTP timing compliance.

PCIe Gen 4 Timing

Ethernet Switch Clocking

Use Scenario: Providing synchronized 100 MHz reference clocks to multiple PCIe Gen 4 endpoints and root complexes in server backplanes.

IC Role / Device Role / Timing Role: Quad-output common clock generator with Gen 4 SRNS-compliant jitter performance and independent output enable control.

Use Value: Meets PCIe Gen 4 total jitter limit of ≤33.6 ps pk-pk while eliminating need for four discrete oscillators and reducing board area by >60%.

Use Scenario: Delivering 125 MHz, 156.25 MHz, and 312.5 MHz clocks to SerDes lanes, MACs, and PHYs in 1/10 GbE switches.

IC Role / Device Role / Timing Role: Any-frequency synthesizer supporting mixed-rate Ethernet interfaces with low additive jitter (<0.7 ps RMS).

Use Value: Enables single-device clock tree for multi-speed Ethernet ports, reducing BOM count and simplifying layout versus discrete oscillator + fanout buffer solutions.

FPGA Processor Clocking

Broadcast Video Timing

Use Scenario: Generating core logic, transceiver, and DDR memory clocks for Xilinx Versal or Intel Agilex FPGAs in broadcast infrastructure.

IC Role / Device Role / Timing Role: Configurable quad clock source with independent voltage and format per output (e.g., LVDS for FPGA banks, HCSL for SerDes).

Use Value: Supports simultaneous 100 MHz (core), 500 MHz (transceiver), 800 MHz (DDR4), and 27 MHz (video) outputs from one IC - eliminating timing skew between domains.

Use Scenario: Synchronizing SDI, HDMI, and audio sample clocks across video processing pipelines in broadcast encoders and routers.

IC Role / Device Role / Timing Role: Precision clock generator with sub-20 ps phase step resolution for frame-accurate genlock and lip-sync alignment.

Use Value: Achieves <±1 ppm frequency accuracy and <100 ps output-to-output skew - critical for SMPTE ST 2059-2 PTP timing compliance.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B04361-GM	Same silicon, identical electrical specs; differs only in factory-programmed NVM configuration (different default frequency map)	Pre-configured for alternate reference input (e.g., 25 MHz vs. 10 MHz crystal) and output frequency set	Select when requiring out-of-box operation at a specific pre-defined clock tree without ClockBuilder Pro setup
LMK04832ISQE/NOPB	Two PLLs (not four independent MultiSynths); higher power (120 mA typ); larger 48-QFN package; supports JESD204B deterministic latency	Targeted at high-speed data converter timing with ultra-low deterministic jitter (<100 fs), not general-purpose multi-protocol clocking	Choose for JESD204B baseband systems where deterministic latency matters more than output count or footprint

Compared with Si5338A-B04361-GM and LMK04832ISQE/NOPB, the SI5338A-B04362-GM delivers superior flexibility per mm² via four fully independent synthesis engines in a compact 24-QFN, making it optimal for space-constrained multi-protocol systems where zero-ppm synthesis and PCIe Gen 4 compliance are primary requirements.

Availability

SI5338A-B04362-GM is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe Gen 4 server backplanes, and broadcast video timing applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338A-B04362-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 family is designed as a programmable, low-jitter quad clock generator targeting high-density timing consolidation in networking, computing, and telecom infrastructure - replacing multiple fixed-frequency oscillators with a single configurable device.

FAQ

What is the maximum output frequency supported by SI5338A-B04362-GM in LVPECL mode?

The SI5338A-B04362-GM supports up to 710 MHz in LVPECL output mode. This is confirmed in Table 6 of the datasheet under "Output Clocks (Differential)" for LVPECL/LVDS/CML formats. Operation above 350 MHz requires use of Fvco/4 or Fvco/6 synthesis paths, and only two unique frequencies above 350 MHz may be active simultaneously. The SI5338A-B04362-GM maintains 0.7 ps RMS jitter at 100 MHz HCSL, meeting PCIe Gen 4 requirements.

Does SI5338A-B04362-GM support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338A-B04362-GM is explicitly SRNS-compliant for PCIe Gen 3 and supports Gen 4 Common Clock mode. Table 12 specifies 0.11–0.32 ps RMS jitter in Gen 3 SRNS mode (PLL BW 2–5 MHz, CDR = 10 MHz), and 0.15–0.45 ps RMS in Gen 4 Common Clock mode. Its MultiSynth™ architecture enables precise loop bandwidth tuning and low deterministic jitter essential for SRNS operation.

Can SI5338A-B04362-GM generate different output voltages on each channel?

Yes, SI5338A-B04362-GM provides independent VDDO0–VDDO3 supply pins, allowing each of its four output pairs to operate at 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This enables direct interfacing with mixed-voltage devices (e.g., LVDS at 2.5 V for FPGAs and HCSL at 1.8 V for CPUs) without level-shifting components - a capability verified in Section 3.4 (Output Stage) and Table 1 of the datasheet.

How is SI5338A-B04362-GM programmed, and is external nonvolatile memory required?

SI5338A-B04362-GM is programmed via its integrated I²C/SMBus interface using ClockBuilder Pro software. It contains on-chip one-time-programmable (OTP) NVM that stores configuration; no external memory is needed. Factory-programmed variants like SI5338A-B04362-GM ship with default settings optimized for common use cases, and field updates are supported via I²C without power cycle.

What is the thermal performance of SI5338A-B04362-GM in continuous operation?

SI5338A-B04362-GM has a junction-to-ambient thermal resistance (θJA) of 37 °C/W under still-air conditions and junction-to-case (θJC) of 10 °C/W. With typical core current of 45 mA at 3.3 V and output currents up to 30 mA per driver, power dissipation remains below 250 mW - enabling reliable operation in sealed industrial enclosures up to +85 °C ambient without forced airflow.

SI5338A-B04362-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338A-B04362-GM FAQ

1.How can I place an order for SI5338A-B04362-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338A-B04362-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338A-B04362-GM reliable?

The price and inventory of SI5338A-B04362-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338A-B04362-GM is usually 5 days.

3.What payment methods are accepted for SI5338A-B04362-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338A-B04362-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338A-B04362-GM?

SI5338A-B04362-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338A-B04362-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338A-B04362-GM?

For technical support, including SI5338A-B04362-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338A-B04362-GM requirements.

6.How does Aetrix verify that SI5338A-B04362-GM is sourced from the original manufacturer or authorized distributors?

All SI5338A-B04362-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338A-B04362-GM meets industry standards.

7.What is the process for return or replacement of SI5338A-B04362-GM?

All SI5338A-B04362-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338A-B04362-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338A-B04362-GM part is unused and in its original packaging.

Return procedure for SI5338A-B04362-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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