Skyworks Solutions Inc. SI5338A-B04362-GMR

Overview

SI5338A-B04362-GMR from Skyworks Solutions is a quad-output, I²C-programmable clock generator implementing MultiSynth™ PLL architecture to synthesize independent frequencies up to 710 MHz on each of four differential outputs with 0 ppm precision, 0.7 ps RMS phase jitter (typ), and PCIe Gen 1–4 Common Clock & Gen 3 SRNS compliance. It replaces multiple crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338A-B04362-GMR datasheet, SI5338A-B04362-GMR pinout, SI5338A-B04362-GMR application, or SI5338A-B04362-GMR equivalent, key selection criteria include its 24-QFN package, I²C/SMBus programmability, per-output voltage configuration (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% at 33–63 kHz), and support for differential input references up to 710 MHz.

Technical Context

The SI5338A-B04362-GMR integrates two synthesis stages: a high-stability PLL stage (loop bandwidth 1.6 MHz) followed by four independent MultiSynth™ fractional-N dividers, enabling true any-frequency synthesis across all outputs. Each output driver supports LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats with configurable supply voltages and independent phase/frequency increment/decrement control.

It accepts flexible reference inputs - external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) - and provides loss-of-lock and loss-of-signal alarms. The device operates across –40 to +85 °C with core supply options of 1.8 V, 2.5 V, or 3.3 V and typical core current of 45 mA at 100 MHz output.

Key Specifications

Pinout & Package

SI5338A-B04362-GMR is housed in a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with an exposed thermal pad. Pin assignments are fixed per Skyworks Si5338 family specification and validated for this variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output programmable clock generator applications.

Compared with Si5332A-D06929-GM and ICS853S01AGI-01LFT, SI5338A-B04362-GMR uniquely delivers four fully independent, software-configurable outputs with zero ppm accuracy and PCIe Gen 4 compliance in a production-proven 24-QFN footprint - making it optimal for multi-protocol, high-density timing systems requiring post-deployment reconfiguration.

Availability

SI5338A-B04362-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switch clocking, and broadcast video sync generation requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338A-B04362-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5338 product line was designed for high-performance, multi-protocol timing in data center, telecom, and broadcast equipment - emphasizing programmability, low jitter, and flexible output configuration to replace discrete oscillator arrays.

FAQ

What is the primary function of the SI5338A-B04362-GMR in a PCIe Gen 4 system?

The SI5338A-B04362-GMR serves as a quad-output common clock generator that delivers four synchronized, low-jitter (≤0.45 ps RMS) 100 MHz reference clocks compliant with PCIe Gen 4 specifications. It replaces discrete oscillators while enabling per-output voltage and format configuration - critical for interoperability across switch, retimer, and endpoint ICs in the same link.

Does the SI5338A-B04362-GMR support spread-spectrum clocking, and how is it configured?

Yes, the SI5338A-B04362-GMR supports spread-spectrum clocking on any output with user-selectable parameters: spread range (0.5–5.0%), modulation rate (33–63 kHz), and direction (down-spread only). Configuration is performed via I²C register writes using Skyworks' ClockBuilder Pro software or direct register access - no external components required.

Can the SI5338A-B04362-GMR generate different output formats simultaneously, such as LVDS and HCSL?

Yes, the SI5338A-B04362-GMR supports mixed-signal operation: CLK0A/B may be configured as LVDS (1.8 V), CLK1A/B as HCSL (1.8 V), CLK2A/B as LVPECL (3.3 V), and CLK3A/B as CMOS (3.3 V), all simultaneously. Each output pair has independent VDDO and format registers, enabling direct interface to heterogeneous logic families without level shifters.

What reference inputs does the SI5338A-B04362-GMR accept, and what is the highest supported frequency?

The SI5338A-B04362-GMR accepts differential (5–710 MHz), SSTL/HSTL (5–350 MHz), CMOS (5–200 MHz), and crystal (8–30 MHz) references. Its highest supported reference frequency is 710 MHz on the IN1/IN2 differential input pair - enabling direct use of recovered SerDes clocks or high-speed test equipment sources without prescaling.

How is phase alignment controlled across the four outputs of the SI5338A-B04362-GMR?

Phase alignment is controlled per output via programmable initial phase offset (–45 to +45 ns range) and fine-grained phase increment/decrement (≤20 ps steps). All outputs derive from the same VCO and MultiSynth™ dividers, ensuring deterministic skew <100 ps between outputs under identical configuration - verified in buffer mode and PLL mode.