Skyworks Solutions Inc. SI5338A-B04774-GM

Overview

SI5338A-B04774-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation from 1.8/2.5/3.3 V core supply in a 4 × 4 mm 24-QFN package. It replaces up to four crystal oscillators in high-speed serial interface timing applications.

For engineers reviewing the SI5338A-B04774-GM datasheet, SI5338A-B04774-GM pinout, SI5338A-B04774-GM application, or SI5338A-B04774-GM equivalent, key selection criteria include PCIe Gen 4 jitter compliance (0.15–0.45 ps RMS), independent output voltage per driver (1.5/1.8/2.5/3.3 V), MultiSynth™ frequency synthesis resolution (1 ppb), spread-spectrum control (0.5–5.0% deviation), and loss-of-lock/loss-of-signal alarm support.

Technical Context

The SI5338A-B04774-GM implements a two-stage PLL architecture: a high-stability reference stage (input range 5–710 MHz) followed by four independent MultiSynth™ fractional-N synthesizers, each driving one output pair. Each synthesizer supports integer or fractional mode with programmable initial phase offset (±45 ns) and glitchless frequency increment/decrement in 1 ppm steps.

Output drivers are fully configurable per channel for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats across 0.16–710 MHz, with independent VDDO supplies (1.4–3.63 V) and internal 22 Ω series termination. The device supports external feedback for zero-delay mode and includes dedicated INTR pin for status reporting.

Key Specifications

Pinout & Package

SI5338A-B04774-GM uses a 24-pin QFN package (4 × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow standard Si5338 top-view layout: pins 1–24 as shown in functional documentation, including six input pins (IN1–IN6), four differential output pairs (CLK0A/B through CLK3A/B), four VDDO supplies, VDD core, SCL/SDA/I²C interface, INTR alarm, and reserved ground.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with Si5338A-B04775-GM, SI5338A-B04774-GM offers identical electrical performance but distinct factory OTP configuration; versus LMK04832RHAT, SI5338A-B04774-GM provides smaller footprint and lower power at the expense of ultra-low-jitter clean-up capability.

Availability

SI5338A-B04774-GM is available at Aetrix Electronics and suitable for PCIe Gen 4 switch timing, Ethernet switching/routing, broadcast video/audio timing, and FPGA-based test equipment requiring stable component supply across industrial temperature ranges.

Supply support for SI5338A-B04774-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5338 product line delivers programmable, low-jitter clock generation for high-speed serial interfaces-including PCIe, Ethernet, Fibre Channel, and broadcast video-enabling flexible, space-constrained timing architectures.

FAQ

What is the primary function of the SI5338A-B04774-GM?

The SI5338A-B04774-GM is an I²C-programmable quad clock generator that synthesizes four independent, low-jitter output frequencies from a single reference input. It replaces multiple discrete oscillators in systems requiring precise, configurable timing-such as PCIe Gen 4 switches and 10 GbE routers-while supporting LVPECL, LVDS, HCSL, CMOS, SSTL, and HSTL output formats.

Does the SI5338A-B04774-GM support PCIe Gen 4 timing requirements?

Yes, the SI5338A-B04774-GM meets PCIe Gen 4 common clock specifications with 0.15–0.45 ps RMS jitter (12 kHz–20 MHz) and is explicitly validated for PCIe Gen 1/2/3/4 Common Clock and Gen 3 SRNS compliance. Its jitter performance is measured using the Skyworks PCIe Clock Jitter Tool and Intel Clock Jitter Tool v1.6.4 under defined test conditions.

How many output formats does the SI5338A-B04774-GM support per channel?

The SI5338A-B04774-GM supports LVPECL, LVDS, HCSL, CMOS, SSTL, and HSTL output formats on each of its four output channels. Format selection is per-channel and programmable via I²C; voltage per output bank (VDDO0–VDDO3) is independently configurable from 1.4 V to 3.63 V to match interface logic levels.

Can the SI5338A-B04774-GM generate frequencies above 350 MHz?

Yes, the SI5338A-B04774-GM supports output frequencies up to 710 MHz. However, only two unique frequencies above 350 MHz can be generated simultaneously-specifically Fvco/4 and Fvco/6-as constrained by the internal VCO architecture. Frequencies between 350–473.33 MHz and 550–710 MHz are supported under this limitation.

What is the role of the INTR pin on the SI5338A-B04774-GM?

The INTR pin on the SI5338A-B04774-GM is an open-drain interrupt output that asserts low during loss-of-lock, loss-of-signal, or register-access errors. It enables real-time monitoring of clock integrity in mission-critical systems such as telecom line cards and broadcast infrastructure, allowing host processors to initiate failover or diagnostics without polling.