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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338A-B04774-GMR

Name: SI5338A-B04774-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338A-B04774-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338A-B04774-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338A-B04774-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338A-B04774-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independent differential output drivers, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL output formats across 0.16–710 MHz. It replaces up to four crystal oscillators in Ethernet switch/router and FPGA clocking systems.

For engineers reviewing the SI5338A-B04774-GMR datasheet, SI5338A-B04774-GMR pinout, SI5338A-B04774-GMR application, or SI5338A-B04774-GMR equivalent, key selection criteria include its MultiSynth™-based any-frequency synthesis, independent per-output voltage (1.5/1.8/2.5/3.3 V), 24-pin 4×4 mm QFN package, and I²C/SMBus programmability with ClockBuilder Pro software integration.

Technical Context

The SI5338A-B04774-GMR implements a two-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) feeding a fractional-N MultiSynth™ synthesis stage per output. Each of the four outputs features independent R, M, P dividers enabling true zero-ppm frequency accuracy and <20 ps phase step resolution.

It supports flexible reference inputs - 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, or 5–710 MHz differential - and offers glitchless frequency increment/decrement in 1 ppm steps via dedicated pins or I²C. Spread spectrum control (0.5–5.0% spread, 33–63 kHz modulation) is configurable per output.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS & Gen 4 common clock jitter requirements
Output Frequency Range	0.16–710 MHz per channel; supports LVPECL/LVDS up to 710 MHz, HCSL up to 250 MHz, CMOS up to 200 MHz
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V ±10%; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V per driver
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch; RoHS-compliant, moisture sensitivity level 3
Operating Temperature	–40 °C to +85 °C ambient; qualified for industrial and telecom line card environments
Power Consumption	45 mA typical core current at 100 MHz on all outputs with 25 MHz reference

Pinout & Package

SI5338A-B04774-GMR is housed in a 24-pin, 4 × 4 mm QFN package with exposed thermal pad. Pin 1 is top-left corner (IN1), and pin numbering proceeds counterclockwise. The package supports standard reflow profiles per JEDEC J-STD-020 and provides low thermal resistance (θ_JA = 37 °C/W).

Pin/Terminal	Circuit Role	Design Meaning
IN1, IN2	Differential reference input pair	Accepts 5–710 MHz AC-coupled differential clock; internal 100 Ω termination enabled
IN3, IN4	Single-ended reference inputs	Support CMOS/SSTL/HSTL signals (5–350 MHz); VIH = 0.7×VDD, VIL = 0.3×VDD
CLK0A/CLK0B – CLK3A/CLK3B	Differential output pairs (4 channels)	Configurable per-channel format (LVPECL/LVDS/HCSL/CML) and voltage (1.5–3.3 V)
VDDO0–VDDO3	Independent output buffer supplies	Enable mixed-signal system interfacing (e.g., 1.8 V FPGA + 3.3 V PHY)
VDD	Core supply	Accepts 1.8 V (±5%), 2.5 V (±10%), or 3.3 V (±10%) with >45 mA typical draw
SCL/SDA	I²C/SMBus interface	Standard-mode (100 kHz) and fast-mode (400 kHz) compatible; supports ClockBuilder Pro programming
INTR	Interrupt output	Open-drain status signal for loss-of-lock and loss-of-signal alarms

Key Features

Feature	Design Value
MultiSynth™ synthesis engine	Enables independent, integer/fractional-N frequency generation on all four outputs with 1 ppb resolution
PCIe Gen 1–4 compliance	Validated for Common Clock and Gen 3 SRNS modes; supports Intel Clock Jitter Tool verification
Per-output voltage control	Each of four output banks powered by separate VDDOx rails (1.5/1.8/2.5/3.3 V) for multi-voltage SoC/FPGA interfacing
Glitchless frequency tuning	Hardware pin-controlled frequency increment/decrement in 1 ppm steps without output interruption
Programmable spread spectrum	Configurable per-output SSC (0.5–5.0% spread, 33–63 kHz rate) to reduce EMI in dense PCB layouts
Zero-delay mode support	External feedback path enables synchronous clock distribution with minimal propagation delay skew

Applications

Ethernet Switch/Routing	PCIe Gen 3/4 Timing
Use Scenario: High-density 1/10 GbE switch fabric requiring synchronized clocks across multiple PHYs and packet processors. IC Role / Device Role / Timing Role: Quad-output clock generator providing independent 125 MHz, 156.25 MHz, and 250 MHz clocks to MAC, PHY, and SerDes blocks. Use Value: Eliminates four discrete oscillators; achieves sub-1 ps RMS jitter required for 10 GbE IEEE 802.3ae compliance.	Use Scenario: Server motherboard with dual x16 PCIe Gen 4 slots and integrated CXL memory controllers. IC Role / Device Role / Timing Role: Common clock source delivering 100 MHz PCIe refclk to root complex and endpoints with Gen 4 SRNS jitter performance. Use Value: Meets PCIe Base Spec 4.0 jitter limit of ≤0.45 ps RMS (1.5–50 MHz band) without external filtering.
Broadcast Video Timing	FPGA-Based Signal Processing
Use Scenario: SMPTE ST 2082-1 12G-SDI video transport system requiring precise 27 MHz, 74.25 MHz, and 148.5 MHz clocks. IC Role / Device Role / Timing Role: Any-frequency synthesizer generating exact broadcast-standard frequencies from a single 25 MHz crystal reference. Use Value: Achieves 0 ppm frequency accuracy and <10 ps cycle-cycle jitter critical for frame-sync and lip-sync integrity.	Use Scenario: Adaptive radar processing platform using Xilinx Versal ACAP with heterogeneous clock domains (AI Engine, PL, DDR, GTY transceivers). IC Role / Device Role / Timing Role: Configurable clock hub supplying 300 MHz (PL), 533 MHz (DDR), 10 GHz (GTY reference), and 100 MHz (AI Engine) from one device. Use Value: Reduces BOM count and layout complexity while maintaining <20 ps inter-output skew across voltage-isolated domains.

Ethernet Switch/Routing

PCIe Gen 3/4 Timing

Use Scenario: High-density 1/10 GbE switch fabric requiring synchronized clocks across multiple PHYs and packet processors.

IC Role / Device Role / Timing Role: Quad-output clock generator providing independent 125 MHz, 156.25 MHz, and 250 MHz clocks to MAC, PHY, and SerDes blocks.

Use Value: Eliminates four discrete oscillators; achieves sub-1 ps RMS jitter required for 10 GbE IEEE 802.3ae compliance.

Use Scenario: Server motherboard with dual x16 PCIe Gen 4 slots and integrated CXL memory controllers.

IC Role / Device Role / Timing Role: Common clock source delivering 100 MHz PCIe refclk to root complex and endpoints with Gen 4 SRNS jitter performance.

Use Value: Meets PCIe Base Spec 4.0 jitter limit of ≤0.45 ps RMS (1.5–50 MHz band) without external filtering.

Broadcast Video Timing

FPGA-Based Signal Processing

Use Scenario: SMPTE ST 2082-1 12G-SDI video transport system requiring precise 27 MHz, 74.25 MHz, and 148.5 MHz clocks.

IC Role / Device Role / Timing Role: Any-frequency synthesizer generating exact broadcast-standard frequencies from a single 25 MHz crystal reference.

Use Value: Achieves 0 ppm frequency accuracy and <10 ps cycle-cycle jitter critical for frame-sync and lip-sync integrity.

Use Scenario: Adaptive radar processing platform using Xilinx Versal ACAP with heterogeneous clock domains (AI Engine, PL, DDR, GTY transceivers).

IC Role / Device Role / Timing Role: Configurable clock hub supplying 300 MHz (PL), 533 MHz (DDR), 10 GHz (GTY reference), and 100 MHz (AI Engine) from one device.

Use Value: Reduces BOM count and layout complexity while maintaining <20 ps inter-output skew across voltage-isolated domains.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D06989-GM	Higher integration: 8 outputs, integrated crystal option, lower jitter (0.35 ps RMS), but larger 32-QFN package	Targeted at multi-slot server backplanes and 5G baseband units requiring >4 outputs	Select when needing ≥8 outputs or ultra-low jitter; not drop-in due to pin count and footprint change
ICS8430I-01T	Fixed-frequency, non-programmable quad LVDS generator; no I²C interface; 1.2 ps RMS jitter	Cost-sensitive, high-volume embedded systems with static clock trees	Choose only if frequency plan is fully fixed and design cannot accommodate I²C configuration overhead

Compared with Si5332A-D06989-GM and ICS8430I-01T, the SI5338A-B04774-GMR uniquely balances field-programmability, 4-output flexibility, and PCIe Gen 4 readiness in a compact 24-QFN footprint-making it optimal for space-constrained, multi-protocol timing applications where post-silicon frequency tuning is required.

Availability

SI5338A-B04774-GMR is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe Gen 4 server platforms, and broadcast video equipment requiring stable component supply and long-term lifecycle assurance.

Supply support for SI5338A-B04774-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog semiconductors, specializing in RF, timing, and precision analog solutions for communications infrastructure, automotive, and industrial markets.

The Si5338 family was designed specifically for high-performance, multi-protocol clock generation in data center, telecom, and broadcast systems-emphasizing low jitter, configurability, and seamless integration with FPGA and ASIC timing architectures.

FAQ

What is the maximum output frequency supported by SI5338A-B04774-GMR in LVPECL mode?

The SI5338A-B04774-GMR supports LVPECL output frequencies up to 710 MHz. This capability is confirmed in Table 6 of the official Skyworks datasheet (Rev. 1.6), which specifies 550–710 MHz as a valid range for LVPECL, LVDS, and CML outputs under defined conditions. Operation above 350 MHz requires use of Fvco/4 or Fvco/6 synthesis paths.

Does SI5338A-B04774-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338A-B04774-GMR is explicitly validated for PCIe Gen 4 SRNS operation. Per Table 12 in the Skyworks datasheet (Rev. 1.6), it achieves ≤0.32 ps RMS jitter in Gen 3 SRNS mode and ≤0.45 ps RMS in Gen 4 common clock mode - both meeting PCI-SIG specifications when configured with PLL bandwidth of 2–4 MHz and CDR = 10 MHz.

Can SI5338A-B04774-GMR generate four different output frequencies simultaneously?

Yes, SI5338A-B04774-GMR is engineered for independent, simultaneous synthesis of four distinct frequencies using its four MultiSynth™ engines. Each output (CLK0–CLK3) has dedicated R, M, and P dividers, enabling true zero-ppm accuracy and full format/voltage configurability per channel - as documented in Section 3.3 "Synthesis Stages" of the datasheet.

What reference inputs does SI5338A-B04774-GMR accept?

SI5338A-B04774-GMR accepts multiple reference types: 8–30 MHz fundamental-mode crystals (differential), 5–200 MHz CMOS-level signals on IN3/IN4, 5–350 MHz SSTL/HSTL inputs, and 5–710 MHz differential AC-coupled clocks on IN1/IN2 or IN5/IN6. All are supported concurrently, with automatic input detection and failover capability.

Is ClockBuilder Pro software required to configure SI5338A-B04774-GMR?

No, ClockBuilder Pro is optional but strongly recommended. SI5338A-B04774-GMR can be programmed via standard I²C/SMBus commands using any host controller. However, ClockBuilder Pro (available free from Skyworks) automates register configuration, validates timing constraints, generates .c files for firmware integration, and supports PCIe jitter compliance testing - significantly reducing development time for SI5338A-B04774-GMR deployment.

SI5338A-B04774-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338A-B04774-GMR FAQ

1.How can I place an order for SI5338A-B04774-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338A-B04774-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338A-B04774-GMR reliable?

The price and inventory of SI5338A-B04774-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338A-B04774-GMR is usually 5 days.

3.What payment methods are accepted for SI5338A-B04774-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338A-B04774-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338A-B04774-GMR?

SI5338A-B04774-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338A-B04774-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338A-B04774-GMR?

For technical support, including SI5338A-B04774-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338A-B04774-GMR requirements.

6.How does Aetrix verify that SI5338A-B04774-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338A-B04774-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338A-B04774-GMR meets industry standards.

7.What is the process for return or replacement of SI5338A-B04774-GMR?

All SI5338A-B04774-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338A-B04774-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338A-B04774-GMR part is unused and in its original packaging.

Return procedure for SI5338A-B04774-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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