Skyworks Solutions Inc. SI5338A-B05145-GMR

Overview

SI5338A-B05145-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in Ethernet switch/router, PCIe, and FPGA clocking systems.

For engineers reviewing the SI5338A-B05145-GMR datasheet, SI5338A-B05145-GMR pinout, SI5338A-B05145-GMR application, or SI5338A-B05145-GMR equivalent, this page delivers verified specifications including MultiSynth™ synthesis resolution (0 ppm), output format support (LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL), independent per-output voltage (1.5/1.8/2.5/3.3 V), spread-spectrum capability (0.5–5.0% at 33–63 kHz), and loss-of-lock/loss-of-signal alarms.

Technical Context

The SI5338A-B05145-GMR integrates a dual-stage PLL architecture: a high-stability reference stage (with crystal or external clock input) feeding a fractional-N MultiSynth™ synthesis stage per output. Each of the four outputs features independent R-, M-, and P-divider programming, enabling any-frequency generation from 0.16 MHz to 710 MHz with integer or fractional synthesis modes.

It supports flexible input references - 8–30 MHz crystal, 5–200 MHz CMOS, 5–350 MHz SSTL/HSTL, or 5–710 MHz differential - and includes dedicated control pins (SCL/SDA/INTR/OEB/PINC/FINC) for real-time frequency/phase adjustment in 1 ppm or <20 ps steps without glitches. External feedback mode enables zero-delay operation.

Key Specifications

Pinout & Package

SI5338A-B05145-GMR is housed in a 4 × 4 mm, 24-lead QFN package with exposed thermal pad. Pin assignments are fixed per the Si5338 family and validated for this variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Compared with SI5338A-B05145-GMR, the B05144 variant offers identical performance but fixed factory configuration, while the B05145 variant adds extended temperature and SSC flexibility - making the A-version ideal for cost-sensitive, standard-temperature PCIe and networking designs where field programmability is essential.

Availability

SI5338A-B05145-GMR is available at Aetrix Electronics and suitable for Ethernet switch/router timing, PCIe Gen 1–4 clock distribution, and FPGA clocking applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338A-B05145-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and connectivity solutions for infrastructure, automotive, and industrial markets.

The SI5338A-B05145-GMR belongs to Skyworks' Si5338 family of programmable clock generators, designed specifically for high-density, multi-protocol timing consolidation in networking, datacenter, and broadcast equipment.

FAQ

What is the core supply current specification for SI5338A-B05145-GMR under full-load conditions?

The SI5338A-B05145-GMR draws 45 mA typical core supply current (IDD) when all four outputs run at 100 MHz with a 25 MHz reference clock. Maximum IDD is 60 mA under worst-case process/voltage/temperature conditions. This value excludes output buffer current, which scales with output format and frequency (e.g., up to 30 mA per LVPECL driver at 710 MHz).

Does SI5338A-B05145-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, SI5338A-B05145-GMR supports PCIe Gen 4 SRNS mode with 0.11–0.32 ps RMS jitter (typical 0.11 ps) when configured with PLL bandwidth of 2–4 MHz and CDR = 10 MHz. This is validated per PCI Express Base Specification 4.0 rev. 0.5 and measured using the Skyworks PCIe Clock Jitter Tool.

Can SI5338A-B05145-GMR generate four different frequencies simultaneously, and what is the maximum frequency per output?

Yes, SI5338A-B05145-GMR synthesizes four independent frequencies simultaneously. Maximum frequency per output depends on format: 710 MHz for LVPECL/LVDS/CML, 250 MHz for HCSL, 350 MHz for SSTL/HSTL, and 200 MHz for CMOS. Note that only two unique frequencies above 350 MHz may be active concurrently (Fvco/4 and Fvco/6).

What input reference options does SI5338A-B05145-GMR support, and what is the minimum crystal frequency?

SI5338A-B05145-GMR accepts external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) inputs. The minimum supported crystal frequency is 8 MHz, with on-chip load capacitance support of 11–13 pF and recommended external load of 17–19 pF per AN360 guidelines.

How is SI5338A-B05145-GMR programmed, and is ClockBuilder Pro required?

SI5338A-B05145-GMR is programmed via its I²C/SMBus interface (SCL/SDA). While ClockBuilder Pro software simplifies configuration and validation, direct register writes are fully supported. Factory-programmed NVM retains settings across power cycles; configuration can be updated in-system without hardware changes.