Skyworks Solutions Inc. SI5338A-B05147-GMR

Overview

SI5338A-B05147-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and support for input references from 5 MHz to 710 MHz. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and Ethernet switch fabric clocks.

For engineers reviewing the SI5338A-B05147-GMR datasheet, SI5338A-B05147-GMR pinout, SI5338A-B05147-GMR application, or SI5338A-B05147-GMR equivalent, key selection considerations include its MultiSynth™ fractional-N synthesis architecture, per-output voltage control (1.5/1.8/2.5/3.3 V), independent phase/frequency adjustment (±45 ns / 1 ppm steps), and 4×4 mm 24-QFN package with 24-pin terminal mapping validated per Skyworks Rev. 1.6 documentation.

Technical Context

The SI5338A-B05147-GMR implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesis blocks, each driving one output pair (CLKxA/CLKxB). Each synthesis path supports integer or fractional mode operation with <1 ppb frequency resolution and programmable initial phase offset (–45 to +45 ns).

Input flexibility includes external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz) references. Output drivers are fully configurable per channel for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL formats, with independent VDDO supply per driver and spread-spectrum capability (0.5–5.0% spread, 33–63 kHz modulation rate).

Key Specifications

Pinout & Package

SI5338A-B05147-GMR uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow Skyworks Rev. 1.6 pinout: IN1–IN6 (six reference inputs), CLK0A–CLK3B (eight clock outputs), VDD/VDDOx (core and output supply pins), SCL/SDA/INTR (I²C control and interrupt), and GND/RSVD_GND.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad-output clock generator applications.

Compared with Si5338A-B05201-GM, SI5338A-B05147-GMR provides full field reprogrammability instead of fixed factory settings, while versus LMK04832ISQE/NOPB it delivers PCIe Gen 4 compliance in half the footprint and lower system cost-making it optimal for volume server, storage, and networking platforms requiring flexible, standards-aligned timing.

Availability

SI5338A-B05147-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 root complex timing, Ethernet switch fabric clocking, and broadcast video synchronization requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5338A-B05147-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog ICs for infrastructure, automotive, and industrial markets.

The Si5338 family is engineered as a programmable any-frequency quad clock generator targeting high-speed serial interface timing-specifically designed to replace multiple discrete oscillators in PCIe, Ethernet, Fibre Channel, and broadcast video systems while maintaining sub-picosecond jitter performance.

FAQ

What is the primary function of the SI5338A-B05147-GMR in a PCIe Gen 4 system?

The SI5338A-B05147-GMR serves as a quad-output common clock generator delivering four low-jitter, phase-aligned reference clocks (e.g., 100 MHz) to PCIe Gen 4 root ports and endpoints. It meets the PCIe Gen 4 common clock jitter specification of ≤0.45 ps RMS and supports dynamic frequency margining-enabling validation of timing margins without hardware changes. Its MultiSynth™ architecture ensures zero-ppm frequency accuracy across all outputs simultaneously.

Does the SI5338A-B05147-GMR support spread-spectrum clocking (SSC), and how is it configured?

Yes, the SI5338A-B05147-GMR supports spread-spectrum clocking on any output with programmable parameters: spread depth from 0.5% to 5.0%, modulation rate from 33 kHz to 63 kHz, and center-spread or down-spread modes. Configuration is performed via I²C register writes using Skyworks' ClockBuilder Pro software or direct register access. SSC reduces electromagnetic interference (EMI) peaks without affecting system timing integrity.

Can the SI5338A-B05147-GMR generate different output voltages on its four clock banks?

Yes, the SI5338A-B05147-GMR supports independent output supply rails: VDDO0, VDDO1, VDDO2, and VDDO3 can each be set to 1.5 V, 1.8 V, 2.5 V, or 3.3 V. This allows direct interfacing with mixed-voltage devices-such as 1.8 V FPGAs, 2.5 V SerDes PHYs, and 3.3 V legacy controllers-without external level shifters. Each VDDO rail powers its corresponding CLKxA/CLKxB pair.

What reference inputs does the SI5338A-B05147-GMR accept, and what are the frequency ranges?

The SI5338A-B05147-GMR accepts six reference inputs: IN1/IN2 and IN5/IN6 support differential signals (LVPECL/LVDS/CML) from 5 MHz to 710 MHz; IN3/IN4 support single-ended CMOS, SSTL, or HSTL from 5 MHz to 350 MHz. It also supports external crystals from 8 MHz to 30 MHz. All inputs include loss-of-signal detection with configurable thresholds and response times.

How is the SI5338A-B05147-GMR programmed, and is external nonvolatile memory required?

The SI5338A-B05147-GMR is programmed via its I²C/SMBus-compatible interface using Skyworks' ClockBuilder Pro software, which generates configuration files and registers. The device contains on-chip one-time-programmable (OTP) NVM that stores the default configuration; no external memory is required. Field updates are supported via I²C without power cycling, and pin-controlled frequency/phase adjustments enable real-time tuning.