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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338A-B05494-GM

Name: SI5338A-B05494-GM
Brand: Skyworks Solutions Inc.
SKU: SI5338A-B05494-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338A-B05494-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338A-B05494-GM.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

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Product details

Overview

SI5338A-B05494-GM from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in Ethernet switch/router, PCIe, and FPGA clocking systems.

For engineers reviewing the SI5338A-B05494-GM datasheet, SI5338A-B05494-GM pinout, SI5338A-B05494-GM application, or SI5338A-B05494-GM equivalent, key selection criteria include output format flexibility (LVPECL/LVDS/HCSL/CMOS/SSTL), independent per-output voltage (1.5/1.8/2.5/3.3 V), any-frequency synthesis down to 0.16 MHz, and I²C/SMBus programmability with ClockBuilder Pro support.

Technical Context

The SI5338A-B05494-GM implements a two-stage PLL architecture: a high-stability reference stage followed by four independent MultiSynth™ fractional-N synthesizers, each driving one output pair. Input reference options include external crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz).

Each output supports independent frequency, format, voltage, phase offset (<±45 ns), spread spectrum (0.5–5.0% at 33–63 kHz), and glitchless frequency increment/decrement in 1 ppm steps. Loss-of-lock and loss-of-signal alarms are integrated, and external feedback enables zero-delay mode.

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps typical (12 kHz–20 MHz); meets PCIe Gen 3 SRNS & Gen 4 common clock specs
Output Frequency Range	0.16–710 MHz depending on format: LVPECL/LVDS (≤710 MHz), HCSL (≤250 MHz), CMOS (≤200 MHz), SSTL/HSTL (≤350 MHz)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz)
Supply Voltages	Core: 1.8/2.5/3.3 V ± tolerance; Output buffers: independently configurable 1.5/1.8/2.5/3.3 V
Package & Pins	24-pin QFN, 4 × 4 mm; 4 differential output pairs (CLK0A/B–CLK3A/B), 6 inputs (IN1–IN6), I²C (SCL/SDA), INTR, OEB
Operating Temperature	–40 to +85 °C; qualified for industrial and telecom line card environments
Power Consumption	45 mA typical core current at 100 MHz on all outputs with 25 MHz refclk

Pinout & Package

SI5338A-B05494-GM is housed in a 24-lead, 4 × 4 mm QFN package with exposed thermal pad. Pin assignments follow Skyworks' standard Si5338 pinout, including four differential output pairs, six input clock pins (IN1–IN6), I²C interface (SCL/SDA), interrupt (INTR), output enable (OEB), and dedicated VDDOx supplies per output bank.

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B	Differential Output Pair 0	LVPECL/LVDS/HCSL/CML/CMOS-configurable; supports 0.16–710 MHz depending on format and supply
CLK1A / CLK1B	Differential Output Pair 1	Independent frequency, format, voltage, and phase control; same range and flexibility as CLK0
CLK2A / CLK2B	Differential Output Pair 2	Supports spread spectrum modulation (0.5–5.0%, 33–63 kHz) and glitchless frequency adjustment
CLK3A / CLK3B	Differential Output Pair 3	Configurable for PCIe Gen 4 common clock (100 MHz HCSL) or broadcast video timing (148.5 MHz LVDS)
IN1 / IN2, IN5 / IN6	Differential Input Pairs	Accept 5–710 MHz differential clocks; require external 100 Ω termination
IN3 / IN4	Single-Ended Input Pins	Accept CMOS/SSTL/HSTL signals (5–350 MHz); support DC-coupled operation with 1.8/2.5/3.3 V logic levels
SCL / SDA	I²C/SMBus Interface	Standard 2-wire serial interface for configuration; compatible with ClockBuilder Pro software
INTR	Interrupt Output	Open-drain status signal indicating loss-of-lock or loss-of-signal events
OEB	Output Enable Control	Active-low pin enabling/disabling all outputs simultaneously without I²C transaction
VDD, VDDO0–VDDO3	Power Supplies	VDD = core supply (1.8/2.5/3.3 V); VDDOx = independent output buffer supplies (1.5/1.8/2.5/3.3 V)

Key Features

Feature	Design Value
MultiSynth™ Any-Frequency Synthesis	Four independent fractional-N synthesizers deliver true zero-ppm accuracy on each output, eliminating need for multiple XO/VCXO components
PCIe Gen 1–4 Compliance	Meets Common Clock (Gen 1/2/3/4) and Gen 3 SRNS jitter requirements; validated with Intel Clock Jitter Tool
Flexible Output Configuration	Per-output selection of LVPECL, LVDS, HCSL, CMOS, SSTL, or HSTL with independent voltage (1.5–3.3 V) and load matching
Glitchless Frequency Adjustment	1 ppm step size with <667 ns update time via pin control; enables dynamic clock scaling in real-time systems
Programmable Phase Offset	Adjustable in <20 ps steps over ±45 ns range; supports skew compensation across multi-lane interfaces (e.g., PCIe, DDR)
Spread Spectrum Clocking (SSC)	Configurable on any output: 0.5–5.0% spread, 33–63 kHz modulation rate; reduces EMI in dense PCB layouts

Applications

Ethernet Switch/Router Timing	PCIe Gen 1–4 Clock Distribution
Use Scenario: High-density 1 GbE/10 GbE switching fabric requiring synchronized 125 MHz and 156.25 MHz clocks across multiple PHYs and MACs. IC Role / Device Role / Timing Role: Quad clock generator providing four low-jitter, format-matched clocks-two LVDS at 125 MHz, one HCSL at 100 MHz, one LVPECL at 156.25 MHz. Use Value: Eliminates four discrete oscillators; reduces board area by >60% and achieves sub-1 ps RMS jitter required for IEEE 802.3 compliance.	Use Scenario: Server motherboard with CPU, GPU, and NVMe SSDs sharing PCIe Gen 4 x16 links requiring common reference clock. IC Role / Device Role / Timing Role: PCIe-compliant clock source delivering 100 MHz HCSL to CPU socket and 100 MHz LVDS to peripheral slots. Use Value: Meets PCIe Gen 4 common clock jitter spec (0.15–0.45 ps RMS); supports simultaneous SRNS and common clock modes via register configuration.
Broadcast Video/Audio Timing	FPGA & Processor Clocking
Use Scenario: SMPTE ST 2082 (12G-SDI) video processing system needing precise 148.5 MHz and 297 MHz clocks with tight phase alignment. IC Role / Device Role / Timing Role: Dual-output timing source generating 148.5 MHz LVDS and 297 MHz LVDS with programmable phase offset <20 ps. Use Value: Enables frame-accurate synchronization across encoder/decoder chains; avoids resampling artifacts in 4K/8K workflows.	Use Scenario: Xilinx Versal ACAP-based AI inference platform requiring multiple domain clocks: 300 MHz for PL, 200 MHz for DDR4, 100 MHz for PCIe, 50 MHz for peripherals. IC Role / Device Role / Timing Role: Configurable clock hub synthesizing four independent frequencies from a single 25 MHz crystal reference. Use Value: Reduces BOM count and layout complexity; supports dynamic reconfiguration via I²C during runtime for power-aware clock gating.

Ethernet Switch/Router Timing

PCIe Gen 1–4 Clock Distribution

Use Scenario: High-density 1 GbE/10 GbE switching fabric requiring synchronized 125 MHz and 156.25 MHz clocks across multiple PHYs and MACs.

IC Role / Device Role / Timing Role: Quad clock generator providing four low-jitter, format-matched clocks-two LVDS at 125 MHz, one HCSL at 100 MHz, one LVPECL at 156.25 MHz.

Use Value: Eliminates four discrete oscillators; reduces board area by >60% and achieves sub-1 ps RMS jitter required for IEEE 802.3 compliance.

Use Scenario: Server motherboard with CPU, GPU, and NVMe SSDs sharing PCIe Gen 4 x16 links requiring common reference clock.

IC Role / Device Role / Timing Role: PCIe-compliant clock source delivering 100 MHz HCSL to CPU socket and 100 MHz LVDS to peripheral slots.

Use Value: Meets PCIe Gen 4 common clock jitter spec (0.15–0.45 ps RMS); supports simultaneous SRNS and common clock modes via register configuration.

Broadcast Video/Audio Timing

FPGA & Processor Clocking

Use Scenario: SMPTE ST 2082 (12G-SDI) video processing system needing precise 148.5 MHz and 297 MHz clocks with tight phase alignment.

IC Role / Device Role / Timing Role: Dual-output timing source generating 148.5 MHz LVDS and 297 MHz LVDS with programmable phase offset <20 ps.

Use Value: Enables frame-accurate synchronization across encoder/decoder chains; avoids resampling artifacts in 4K/8K workflows.

Use Scenario: Xilinx Versal ACAP-based AI inference platform requiring multiple domain clocks: 300 MHz for PL, 200 MHz for DDR4, 100 MHz for PCIe, 50 MHz for peripherals.

IC Role / Device Role / Timing Role: Configurable clock hub synthesizing four independent frequencies from a single 25 MHz crystal reference.

Use Value: Reduces BOM count and layout complexity; supports dynamic reconfiguration via I²C during runtime for power-aware clock gating.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5332A-D05494-GM	Higher integration: 8 outputs, lower jitter (0.35 ps RMS), integrated EEPROM, supports JESD204B deterministic latency	Targeted at JESD204B SerDes, radar, and high-speed data converters where sub-0.5 ps jitter and deterministic delay are mandatory	Select when migrating to higher channel count or JESD204B systems; requires updated ClockBuilder Pro configuration and layout review
ICS8430I-01LG	Fixed-frequency quad LVDS generator (no I²C programming); 1.2 ps RMS jitter; 3.3 V only; no spread spectrum or phase adjustment	Suitable for cost-sensitive, static-clock applications like legacy telecom line cards where frequency agility is unnecessary	Choose for non-reprogrammable, low-cost deployments with fixed 100/125/156.25 MHz outputs; no firmware or configuration overhead

Compared with Si5332A-D05494-GM, SI5338A-B05494-GM offers broader input reference support and simpler configuration for general-purpose any-frequency synthesis; versus ICS8430I-01LG, it provides full programmability and jitter performance critical for PCIe Gen 4 and broadcast video.

Availability

SI5338A-B05494-GM is available at Aetrix Electronics and suitable for Ethernet switch/router, PCIe Gen 1–4 host platforms, and FPGA-based video processing systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5338A-B05494-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure, automotive, and mobile markets.

The Si5338 product line delivers highly configurable, low-jitter clock generation for high-speed digital systems-including PCIe, Ethernet, and broadcast video-where precise timing, multi-format flexibility, and programmability are essential.

FAQ

What is the primary function of the SI5338A-B05494-GM?

The SI5338A-B05494-GM is an I²C-programmable quad clock generator that synthesizes four independent, low-jitter output clocks from a single input reference. It replaces multiple discrete oscillators in systems requiring flexible frequency, format, and voltage configurations-such as PCIe Gen 4, 10 GbE switches, and FPGA-based video processors-while maintaining 0.7 ps RMS typical phase jitter.

Does the SI5338A-B05494-GM support PCIe Gen 4 Common Clock compliance?

Yes, the SI5338A-B05494-GM meets PCIe Gen 4 Common Clock jitter specifications (0.15–0.45 ps RMS) when configured for 100 MHz HCSL output with appropriate PLL bandwidth (2–4 MHz) and CDR settings. This compliance is verified using the Skyworks PCIe Clock Jitter Tool and aligns with PCI-Express Base Specification 4.0 rev. 0.5.

Can the SI5338A-B05494-GM generate different output formats simultaneously?

Yes, the SI5338A-B05494-GM supports simultaneous mixed-format outputs: for example, CLK0A/B as LVDS (125 MHz), CLK1A/B as HCSL (100 MHz), CLK2A/B as CMOS (50 MHz), and CLK3A/B as LVPECL (156.25 MHz). Each output bank has independent VDDO supply and format registers, enabling heterogeneous clock distribution from a single IC.

What input reference options does the SI5338A-B05494-GM support?

The SI5338A-B05494-GM accepts multiple input references: external crystal (8–30 MHz), single-ended CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), or differential (5–710 MHz). Differential inputs require external 100 Ω termination; single-ended inputs support 1.8/2.5/3.3 V logic levels and DC coupling. Crystal drive level is limited to 100 µW max.

How is the SI5338A-B05494-GM programmed and configured?

The SI5338A-B05494-GM is programmed via its I²C/SMBus-compatible interface using Skyworks' ClockBuilder Pro software. This GUI tool enables full register configuration-including frequency synthesis, output format/voltage, spread spectrum, phase offset, and alarm thresholds-and generates custom configuration files for one-time OTP programming or runtime I²C writes.

SI5338A-B05494-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338A-B05494-GM FAQ

1.How can I place an order for SI5338A-B05494-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338A-B05494-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338A-B05494-GM reliable?

The price and inventory of SI5338A-B05494-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338A-B05494-GM is usually 5 days.

3.What payment methods are accepted for SI5338A-B05494-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338A-B05494-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338A-B05494-GM?

SI5338A-B05494-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338A-B05494-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338A-B05494-GM?

For technical support, including SI5338A-B05494-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338A-B05494-GM requirements.

6.How does Aetrix verify that SI5338A-B05494-GM is sourced from the original manufacturer or authorized distributors?

All SI5338A-B05494-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338A-B05494-GM meets industry standards.

7.What is the process for return or replacement of SI5338A-B05494-GM?

All SI5338A-B05494-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5338A-B05494-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338A-B05494-GM part is unused and in its original packaging.

Return procedure for SI5338A-B05494-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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