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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Skyworks Solutions Inc. SI5338A-B05696-GMR

Name: SI5338A-B05696-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5338A-B05696-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5338A-B05696-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Application Specific Clock/Timing

Package:: 24-VFQFN Exposed Pad

Datasheet:: SI5338A-B05696-GMR.pdf

Description:: I2C CONTROL, 4-OUTPUT, ANY FREQU

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5338A-B05696-GMR from Skyworks Solutions is an I²C-programmable quad clock generator with four independently configurable differential or single-ended outputs, 0.7 ps RMS typical phase jitter, PCIe Gen 1–4 Common Clock and Gen 3 SRNS compliance, and operation across –40 to +85 °C. It replaces up to four crystal oscillators in high-speed serial interface timing applications such as PCIe root complexes and FPGA clock trees.

For engineers reviewing the SI5338A-B05696-GMR datasheet, SI5338A-B05696-GMR pinout, SI5338A-B05696-GMR application, or SI5338A-B05696-GMR equivalent, key selection considerations include its MultiSynth™ fractional-N synthesis architecture, independent output voltage per driver (1.5/1.8/2.5/3.3 V), 0 ppm frequency accuracy on all outputs, and support for LVPECL/LVDS/HCSL/CMOS/SSTL/HSTL signal formats.

Technical Context

The SI5338A-B05696-GMR implements a two-stage PLL architecture: a high-stability integer-N Phase-Locked Loop (Stage 1) locks to one of six input references (crystal, CMOS, SSTL/HSTL, or differential), followed by four independent MultiSynth™ fractional-N synthesizers (Stage 2) generating each output. Each output supports programmable phase offset (<20 ps steps), frequency increment/decrement (1 ppm steps), and spread-spectrum modulation (0.5–5.0% spread, 33–63 kHz rate).

It operates from a single 1.8/2.5/3.3 V core supply with 45 mA typical current draw, integrates OTP NVM for factory programming, and features loss-of-lock and loss-of-signal alarms via dedicated INTR pin. The device supports external feedback for zero-delay mode and includes independent output enable (OEB) and frequency/phase control pins (FINC/PINC).

Key Specifications

Parameter	Value and Actual Design Meaning
Phase Jitter (RMS)	0.7 ps - meets PCIe Gen 3 SRNS and Gen 4 common clock jitter requirements at 100 MHz HCSL output
Output Count & Type	4 differential outputs (CLK0A/B–CLK3A/B) - supports up to eight single-ended clocks via internal termination configuration
Frequency Range	0.16–710 MHz - covers PCIe (100 MHz), Ethernet (125/156.25 MHz), Fibre Channel (1.0625 GHz ÷ 2 = 531.25 MHz), and broadcast video (27/74.25/148.5 MHz)
Input Reference Support	Crystal (8–30 MHz), CMOS (5–200 MHz), SSTL/HSTL (5–350 MHz), differential (5–710 MHz) - enables flexible system-level clock sourcing
Supply Voltages	VDD = 1.8/2.5/3.3 V ±10%; VDDOx = 1.4–3.63 V - allows mixed-voltage board design with independent output driver voltage per channel
Operating Temperature	–40 to +85 °C - qualified for industrial and telecom line card environments without derating
Package	24-pin QFN, 4 × 4 mm, 0.5 mm pitch - surface-mount compatible with standard reflow profiles and IPC-7351B footprint

Pinout & Package

SI5338A-B05696-GMR uses a 24-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.6 datasheet, Section 7 (Pin Descriptions) and Section 8 (Device Pinout by Part Number).

Pin/Terminal	Circuit Role	Design Meaning
CLK0A / CLK0B CLK1A / CLK1B CLK2A / CLK2B CLK3A / CLK3B	Differential clock outputs	Four independent pairs; each pair configurable as LVPECL, LVDS, HCSL, CML, SSTL, or HSTL with selectable VDDOx supply
IN1/IN2, IN5/IN6	Differential input clocks	Accept 5–710 MHz AC-coupled differential signals; require external 100 Ω termination
IN3 / IN4	Single-ended input clocks	Support CMOS/SSTL/HSTL inputs (5–350 MHz); IN3 is primary reference, IN4 is secondary/fallback
SCL / SDA	I²C/SMBus interface	Standard 2-wire serial bus (up to 400 kHz) for register configuration, status readback, and dynamic frequency tuning
INTR	Interrupt output	Open-drain active-low signal indicating loss-of-lock, loss-of-signal, or other fault conditions
OEB / FINC / PINC	Hardware control inputs	Asynchronous output enable, frequency increment, and phase increment pins - enable glitchless real-time adjustments without I²C traffic
VDD / VDDO0–VDDO3 / GND	Power and ground	VDD supplies core logic; VDDOx supplies respective output drivers; dedicated GND pins minimize noise coupling between domains

Key Features

Feature	Design Value
MultiSynth™ synthesis	Four independent fractional-N synthesizers deliver true 0 ppm frequency accuracy on all outputs, eliminating need for multiple crystals
PCIe Gen 1–4 compliance	Meets PCIe Gen 3 SRNS and Gen 4 common clock jitter specs (≤0.32 ps RMS and ≤0.45 ps RMS respectively) in HCSL 100 MHz configuration
Independent output voltage per driver	VDDO0–VDDO3 individually set to 1.5/1.8/2.5/3.3 V - enables direct interfacing with mixed-voltage FPGAs, ASICs, and SerDes PHYs
Programmable phase adjustment	±45 ns range with <20 ps step resolution - supports deterministic skew alignment across multi-lane interfaces (e.g., PCIe x16, DDR memory channels)
Spread-spectrum clocking (SSC)	Configurable on any output: 0.5–5.0% down-spread, 33–63 kHz modulation rate - reduces EMI peak emissions without affecting timing margin
External feedback mode	Enables zero-delay buffer operation - preserves input clock phase relationship while driving multiple loads with low additive jitter (0.165 ps RMS typical)

Applications

PCIe Root Complex Timing	Ethernet Switch Clock Tree
Use Scenario: Providing synchronized 100 MHz reference clocks to CPU, GPU, and peripheral controllers in a server motherboard with multiple PCIe slots. IC Role / Device Role / Timing Role: Quad-output clock generator delivering PCIe-compliant common clock with sub-0.5 ps RMS jitter and deterministic inter-output skew <100 ps. Use Value: Ensures PCIe Gen 4 link training success and long-term bit error rate stability under thermal and voltage variation.	Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE switch fabric, packet processor, and PHY layers on a single line card. IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact IEEE 802.3 compliant rates from a single 25 MHz crystal reference. Use Value: Eliminates discrete oscillator count, reduces BOM cost, and simplifies layout by consolidating timing into one 4×4 mm QFN.
Broadcast Video Synchronization	FPGA-Based Test Equipment
Use Scenario: Distributing frame-locked 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks across SDI transmitter/receiver modules in a 4K video router. IC Role / Device Role / Timing Role: Low-jitter quad generator with programmable phase offset enabling precise inter-channel alignment across SMPTE ST 2082-1 compliant links. Use Value: Prevents video artifacts due to inter-channel skew and maintains genlock integrity across multi-board systems.	Use Scenario: Supplying variable-rate sampling clocks (10–500 MHz) and trigger synchronization signals to high-speed ADC/DAC and digital pattern generators in automated test equipment. IC Role / Device Role / Timing Role: Reconfigurable clock source supporting dynamic frequency sweeps and real-time phase adjustments via I²C or hardware pins. Use Value: Enables adaptive test sequencing without firmware reload, reducing test cycle time and improving repeatability.

PCIe Root Complex Timing

Ethernet Switch Clock Tree

Use Scenario: Providing synchronized 100 MHz reference clocks to CPU, GPU, and peripheral controllers in a server motherboard with multiple PCIe slots.

IC Role / Device Role / Timing Role: Quad-output clock generator delivering PCIe-compliant common clock with sub-0.5 ps RMS jitter and deterministic inter-output skew <100 ps.

Use Value: Ensures PCIe Gen 4 link training success and long-term bit error rate stability under thermal and voltage variation.

Use Scenario: Generating 125 MHz, 156.25 MHz, and 312.5 MHz clocks for 1/10/25 GbE switch fabric, packet processor, and PHY layers on a single line card.

IC Role / Device Role / Timing Role: Any-frequency synthesizer producing exact IEEE 802.3 compliant rates from a single 25 MHz crystal reference.

Use Value: Eliminates discrete oscillator count, reduces BOM cost, and simplifies layout by consolidating timing into one 4×4 mm QFN.

Broadcast Video Synchronization

FPGA-Based Test Equipment

Use Scenario: Distributing frame-locked 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks across SDI transmitter/receiver modules in a 4K video router.

IC Role / Device Role / Timing Role: Low-jitter quad generator with programmable phase offset enabling precise inter-channel alignment across SMPTE ST 2082-1 compliant links.

Use Value: Prevents video artifacts due to inter-channel skew and maintains genlock integrity across multi-board systems.

Use Scenario: Supplying variable-rate sampling clocks (10–500 MHz) and trigger synchronization signals to high-speed ADC/DAC and digital pattern generators in automated test equipment.

IC Role / Device Role / Timing Role: Reconfigurable clock source supporting dynamic frequency sweeps and real-time phase adjustments via I²C or hardware pins.

Use Value: Enables adaptive test sequencing without firmware reload, reducing test cycle time and improving repeatability.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5338A-B05700-GM	Same Si5338A die, different factory-programmed configuration - outputs pre-set to 100/125/156.25/312.5 MHz; no field reprogramming required	Fixed-frequency use cases only; lacks runtime I²C programmability and frequency/phase tuning capability	Select when production volume justifies OTP customization and flexibility is not needed
ICS853S01AGI-01LFT	Non-programmable 4-output LVDS clock generator; max output 700 MHz; no spread spectrum; 1.2 ps RMS jitter; 32-pin TQFP package	Limited to fixed-ratio multiplication; no fractional synthesis, no phase control, no multi-format outputs	Select only for simple fanout/buffering where frequency agility and jitter performance are secondary

Compared with Si5338A-B05700-GM, SI5338A-B05696-GMR offers full field reprogrammability and dynamic tuning; compared with ICS853S01AGI-01LFT, it delivers superior jitter, format flexibility, and integrated synthesis - making it suitable for high-speed serial interface timing where precision and adaptability are critical.

Availability

SI5338A-B05696-GMR is available at Aetrix Electronics and suitable for PCIe Gen 4 server platforms, 10/25/100 GbE switching infrastructure, and broadcast video synchronization systems requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for SI5338A-B05696-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for communications, automotive, and industrial markets.

The Si5338 product line was designed to replace multiple discrete oscillators and clock buffers in high-speed digital systems, delivering ultra-low jitter, software-defined frequency agility, and compact integration for PCIe, Ethernet, and broadcast timing applications.

FAQ

What is the default factory configuration of the SI5338A-B05696-GMR?

The SI5338A-B05696-GMR ships unprogrammed - it contains blank OTP memory and requires initial configuration via I²C using ClockBuilder Pro software or custom host firmware. Unlike pre-programmed variants (e.g., SI5338A-B05700-GM), this part provides full field flexibility for any-frequency synthesis and runtime parameter updates.

Does the SI5338A-B05696-GMR support PCIe Gen 4 Separate Reference No Spread (SRNS) mode?

Yes, the SI5338A-B05696-GMR meets PCIe Gen 4 SRNS jitter requirements (≤0.32 ps RMS) when configured with a 2–4 MHz PLL bandwidth and CDR frequency of 10 MHz, using HCSL 100 MHz output. This is verified per PCI-SIG specification and documented in Skyworks AN562 and the Rev. 1.6 datasheet Table 12.

Can the SI5338A-B05696-GMR generate frequencies above 350 MHz on all four outputs simultaneously?

No. While individual outputs support up to 710 MHz (LVPECL/LVDS), only two unique frequencies above 350 MHz can be generated simultaneously - specifically Fvco/4 and Fvco/6 - due to VCO frequency constraints in the MultiSynth™ architecture, as specified in Section 3.3 of the datasheet.

How is spread-spectrum clocking (SSC) configured on the SI5338A-B05696-GMR?

SSC is enabled per-output via I²C register writes: SSC frequency deviation (0.5–5.0%), modulation rate (33–63 kHz), and direction (down-spread only) are set independently. Default is 0.5% down-spread at ~31.5 kHz. Hardware pin control is not supported - configuration requires I²C or ClockBuilder Pro.

What is the thermal performance of the SI5338A-B05696-GMR in a typical 4-layer PCB layout?

In still air with recommended PCB land pattern (Section 10 of datasheet), the SI5338A-B05696-GMR exhibits θJA = 37 °C/W and θJC = 10 °C/W. At 45 mA core current and 3.3 V supply, power dissipation is ~150 mW, resulting in <6 °C junction-to-ambient rise - well within the –40 to +85 °C operating range without forced airflow.

SI5338A-B05696-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: MultiSynth™

Package/Case:: 24-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: -

Main Purpose:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 24-QFN (4x4)

SI5338A-B05696-GMR FAQ

1.How can I place an order for SI5338A-B05696-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5338A-B05696-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5338A-B05696-GMR reliable?

The price and inventory of SI5338A-B05696-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5338A-B05696-GMR is usually 5 days.

3.What payment methods are accepted for SI5338A-B05696-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5338A-B05696-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5338A-B05696-GMR?

SI5338A-B05696-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5338A-B05696-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5338A-B05696-GMR?

For technical support, including SI5338A-B05696-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5338A-B05696-GMR requirements.

6.How does Aetrix verify that SI5338A-B05696-GMR is sourced from the original manufacturer or authorized distributors?

All SI5338A-B05696-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5338A-B05696-GMR meets industry standards.

7.What is the process for return or replacement of SI5338A-B05696-GMR?

All SI5338A-B05696-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5338A-B05696-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5338A-B05696-GMR part is unused and in its original packaging.

Return procedure for SI5338A-B05696-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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